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TNETV1644ZDU6 数据表(PDF) 227 Page - Texas Instruments |
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TNETV1644ZDU6 数据表(HTML) 227 Page - Texas Instruments |
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227 / 306 page  TMS320DM6437 Digital Media Processor www.ti.com SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 Table 6-41. VENC (Including Digital LCD and DACs) Register Descriptions (continued) 0x01C7 24B4 0x01C7 24B4 Reserved 0x01C7 24B4 0x01C7 24B4 0x01C7 24B8 VSTAT Video Status 0x01C7 24BC Reserved 0x01C7 24C0 0x01C7 24C4 DACTST DAC Test 0x01C7 24C8 YCOLVL YOUT and COUT Levels 0x01C7 24CC SCPROG Sub-Carrier Programming 0x01C7 24D0 0x01C7 24D4 Reserved 0x01C7 24D8 0x01C7 24DC CVBS Composite Mode 0x01C7 24E0 CMPNT Component Mode 0x01C7 24E4 ETMG0 CVBS Timing Control 0 0x01C7 24E8 ETMG1 CVBS Timing Control 1 0x01C7 24EC ETMG2 Component Timing Control 0 0x01C7 24F0 ETMG3 Component Timing Control 1 0x01C7 24F4 DACSEL DAC Output Select 0x01C7 24F8 Reserved 0x01C7 24FC 0x01C7 2500 ARGBX0 Analog RGB Matrix 0 0x01C7 2504 ARGBX1 Analog RGB Matrix 1 0x01C7 2508 ARGBX2 Analog RGB Matrix 2 0x01C7 250C ARGBX3 Analog RGB Matrix 3 0x01C7 2510 ARGBX4 Analog RGB Matrix 4 0x01C7 2514 DRGBX0 Digital RGB Matrix 0 0x01C7 2518 DRGBX1 Digital RGB Matrix 1 0x01C7 251C DRGBX2 Digital RGB Matrix 2 0x01C7 2520 DRGBX3 Digital RGB Matrix 3 0x01C7 2524 DRGBX4 Digital RGB Matrix 4 0x01C7 2528 VSTARTA Vertical Data Valid Start Position for Even Field 0x01C7 252C OSDCLK0 OSD Clock Control 0 0x01C7 2530 OSDCLK1 OSD Clock Control 1 0x01C7 2534 HVLDCL0 Horizontal Valid Culling Control 0 0x01C7 2538 HVLDCL1 Horizontal Valid Culling Control 1 0x01C7 253C OSDHADV OSD Horizontal Sync Advance Submit Documentation Feedback Peripheral Information and Electrical Specifications 227 |
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