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SPC560P34L1 数据表(PDF) 101 Page - STMicroelectronics |
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SPC560P34L1 数据表(HTML) 101 Page - STMicroelectronics |
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101 / 103 page  SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3 Revision history Doc ID 16100 Rev 7 101/103 13-May-2011 4 Editorial and formatting changes throughout Cover page features list: • changed core feature “64 MHz” to “Up to 64 MHz” • changed Data flash memory “64 (4 × 16) KB” to “Additional 64 (4 × 16) KB” • changed “1 FlexCAN interface” to “Up to 2 FlexCAN interface” Updated Device summary Section “Introduction“: Reorganized contents SPC560P40 device configuration differences: Editorial changes to indicate that the table concerns only the SPC560P40 devices); removed “DSPI” row Block diagram (SPC560P40 full-featured configuration): reorganized blocks above and below peripheral bridge; made arrow going from peripheral bridge to crossbar switch bidirectional; removed SPC560P34 part number from title Added section “Features details” 64-pin and 100-pin LQFP pinout diagrams: replaced instances of HV_AD0 with HV_ADC0 System pins: updated “XTAL” and “EXTAL” rows Updated LQFP thermal characteristics Updated EMI testing specifications section “Voltage regulator electrical characteristics“: removed BCP56 from named BJTs; replaced two configuration diagrams and two electrical characteristics tables with single diagram and single table Voltage regulator electrical characteristics: updated VDD_LV_REGCOR row Low voltage monitor electrical characteristics: updated VMLVDDOK_H max value—was 1.15 V; is 1.145 V Supply current (5.0 V, NVUSRO[PAD3V5V] = 0): changed symbol IDD_LV_CORE to IDD_LV_CORx; changed parameter classification from T to P for IDD_LV_CORx RUN— Maximum mode at 64 MHz; added IDD_FLASH characteristics; replaced instances of “Airbag” mode with “Typical mode” Supply current (3.3 V, NVUSRO[PAD3V5V] = 1): changed symbol IDD_LV_CORE to IDD_LV_CORx; replaced instances of “Airbag” mode with “Typical mode” DC electrical characteristics (3.3 V, NVUSRO[PAD3V5V] = 1): corrected parameter description for VOL_F—was “Fast, high level output voltage”; is “Fast, low level output voltage” Added Section 3.10.4, Input DC electrical characteristics definition Main oscillator output electrical characteristics tables: replaced instances of EXTAL with XTAL; added load capacitance parameter FMPLL electrical characteristics: updated conditions and table title; removed fsys row; updated fFMPLLOUT values; replaced instances of VDDPLL with VDD_LV_COR0; replaced instances of VSSPLL with VSS_LV_COR0 16 MHz RC oscillator electrical characteristics: removed rows Δ RCMTRIM and Δ RCMSTEP ADC characteristics and error definitions: updated symbols ADC conversion characteristics: updated symbols; added row tADC_PU Added Section 3.15.2, Flash memory power supply DC characteristics Added Section 3.15.3, Start-up/Switch-off timings Removed section “Generic timing diagrams” Updated Start-up reset requirements diagram Removed FlexCAN timing characteristics RESET electrical characteristics: added row for tPOR In the range of figures “DSPI Classic SPI Timing — Master, CPHA = 0” to “DSPI PCS Strobe (PCSS) Timing”: added note Updated Order codes Table 45. Document revision history (continued) Date Revision Changes |
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