SPC560P34L1 datasheet(102/103 Pages) STMICROELECTRONICS

102 / 103 page

Revision history

SPC560P34L1, SPC560P34L3, SPC560P40L1, SPC560P40L3

102/103

Doc ID 16100 Rev 7

13-May-2011

(continued)

Commercial product code structure: Replaced “Conditioning” with “Packing”

Table 44: added “DUT”, “NPN”, and “RISC”

22-Dec-2011

Updated

Table 1: Device summary

Updated

Section 1.5.28: Nexus Development Interface (NDI)

Section Table 2.: SPC560P34/SPC560P40 device comparison: changed Nexus L1+

with Nexus Class 1

Table 7: Pin muxing: removed E[0] row

Table 9: Absolute maximum ratings: updated minumum and maximum values for TVDD

parameter

Section 3.10: DC electrical characteristics: Removed oscillator margin.

Removed Section NVUSRO[OSCILLATOR_MARGIN] field description and Table

NVUSRO[OSCILLATOR_MARGIN] field description

Updated Section 3.8.1: Voltage regulator electrical characteristics

Updated

Section Figure 10.: Voltage regulator configuration

Table 16: Voltage regulator electrical characteristics: added LReg row, updated condition

for CDEC1, CDEC2 and CDEC3

Removed “Order codes” tables

20-Dec-2012

Table 9 (Absolute maximum ratings): updated TVDD parameter, the minimum value to

3.0 V/s, added note on minimum value, and the maximum value to 0.5 V/µs

Table 20 (Supply current (5.0 V, NVUSRO[PAD3V5V] = 0)): added IDD_HV_REG row

Table 22 (Supply current (3.3 V, NVUSRO[PAD3V5V] = 1)): added IDD_HV_REG row

Updated

Section 3.14.1, Input impedance and ADC accuracy

Table 30 (ADC conversion characteristics): renamed “RSW1” in “RSW”

Table 31 (Program and erase specifications): added tESRT row

18-Sep-2013

Updated Disclaimer.

Table 45.

Document revision history (continued)

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