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ST7MC1K2-Auto 数据表(PDF) 165 Page - STMicroelectronics |
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ST7MC1K2-Auto 数据表(HTML) 165 Page - STMicroelectronics |
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165 / 371 page ![]() Obsolete Product(s) - Obsolete Product(s) ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto On-chip peripherals 165/371 Figure 69. LIN synch field measurement LIN baud rate Baud rate programming is done by writing a value in the LPR prescaler or performing an automatic resynchronization as described below. Automatic resynchronization To automatically adjust the baud rate based on measurement of the LIN synch field: ● Write the nominal LIN prescaler value (usually depending on the nominal baud rate) in the LPFR/LPR registers. ● Set the LASE bit to enable the auto synchronization unit. When auto synchronization is enabled, after each LIN synch break, the time duration between five falling edges on RDI is sampled on fCPU and the result of this measurement is stored in an internal 15-bit register called SM (not user accessible) (see Figure 69). Then the LDIV value (and its associated LPFR and LPR registers) are automatically updated at the end of the fifth falling edge. During LIN synch field measurement, the SCI state machine is stopped and no data is transferred to the data register. LIN slave baud rate generation In LIN mode, transmission and reception are driven by the LIN baud rate generator. Note: LIN master mode uses the extended or conventional prescaler register to generate the baud rate. If LINE bit = 1 and LSLV bit = 1 then the conventional and extended baud rate generators are disabled. Thus, the baud rate for the receiver and transmitter are both set to the same value, which depends on the LIN Slave baud rate generator: Equation 9 where LDIV is an unsigned fixed point number. The mantissa is coded on 8 bits in the LPR register and the fraction is coded on 4 bits in the LPFR register. If LASE bit = 1 then LDIV is automatically updated at the end of each LIN synch field. LIN synch break Extra ’1’ Bit 0 Bit 1 Start bit Stop bit Next start bit LIN synch field Measurement = 8.TBR =SM.tCPU LPR(n) LPR(n+1) LPR = tBR/(16.tCPU) = rounding (SM/128) tCPU = CPU period tBR = Baud rate period tBR SM = Synch measurement register (15 bits) tBR = 16.LP.tCPU Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Tx = Rx = (16*LDIV) fCPU Obsolete Product(s) - Obsolete Product(s) |
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