数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

ST7MC1K2-Auto 数据表(PDF) 169 Page - STMicroelectronics

部件名 ST7MC1K2-Auto
功能描述  Clock, reset and supply management
PDF  371 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7MC1K2-Auto 数据表(HTML) 169 Page - STMicroelectronics

Back Button ST7MC1K2-Auto Datasheet HTML 165Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 166Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 167Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 168Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 169Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 170Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 171Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 172Page - STMicroelectronics ST7MC1K2-Auto Datasheet HTML 173Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 169 / 371 page
background image
Obsolete
Product(s)
- Obsolete
Product(s)
ST7MC1K2-Auto, ST7MC1K6-Auto, ST7MC2S4-Auto, ST7MC2S6-Auto
On-chip peripherals
169/371
Error due to baud rate quantization
The baud rate can be adjusted in steps of 1/(16 * LDIV). The worst case occurs when the
‘real’ baud rate is in the middle of a step.
This leads to a quantization error (DQUANT) equal to 1/(2*16*LDIVMIN).
Impact of clock deviation on maximum baud rate
The choice of the nominal baud rate (LDIVNOM) influences both the quantization error
(DQUANT) and the measurement error (DMEAS). The worst case occurs for LDIVMIN.
Consequently, at a given CPU frequency, the maximum possible nominal baud rate
(LPRMIN) should be chosen with respect to the maximum tolerated deviation given by the
equation:
DTRA + 2/(128*LDIVMIN) + 1/(2*16*LDIVMIN) + DREC + DTCL <3.75%
Example:
A nominal baud rate of 20Kbits/s at TCPU = 125ns (8 MHz) leads to LDIVNOM = 25d.
LDIVMIN = 25 - 0.15*25 = 21.25
DMEAS = 2/(128*LDIVMIN) * 100 = 0.00073%
DQUANT =1/(2*16*LDIVMIN) * 100 = 0.0015%
LIN slave systems
For LIN slave systems (the LINE and LSLV bits are set), receivers wake up by LIN synch
break or LIN identifier detection (depending on the LHDM bit).
Hot plugging feature for LIN slave nodes
In LIN slave mute mode (the LINE, LSLV and RWU bits are set) it is possible to hot plug to a
network during an ongoing communication flow. In this case the SCI monitors the bus on the
RDI line until 11 consecutive dominant bits have been detected and discards all the other
bits received.
10.5.10
LIN mode registers
SCI status register (SCISR)
SCISR
Reset value: 1100 0000 (C0h)
7
654
32
10
TDRE
TC
RDRF
IDLE
LHE
NF
FE
PE
RO
RO
RO
RO
RO
RO
RO
RO
Obsolete
Product(s)
- Obsolete
Product(s)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com