T48C862-R4 datasheet(8/107 Pages) ATMEL

8 / 107 page

T48C862-R4 [Preliminary]

4551C–4BMCU–01/04

Figure 5. Output Power Measurement

Application Circuit

For the supply-voltage blocking capacitor C

3, a value of 68 nF/X7R is recommended

(see Figure 6 on page 9 and Figure 7 on page 10). C

1 and C2 are used to match the loop

antenna to the power amplifier where C

1 typically is 8.2 pF/NP0 and C2 is 6 pF/NP0

(10 pF + 15 pF in series); for C

2 two capacitors in series should be used to achieve a

better tolerance value and to have the possibility to realize the Z

Load,opt by using stan-

dard valued capacitors.

1 forms together with the pins of PLL transmitter block and the PCB board wires a

series resonance loop that suppresses the 1

st harmonic, thus, the position of C

1 on the

PCB is important. Normally the best suppression is achieved when C

1 is placed as close

as possible to the pins ANT1 and ANT2.

The loop antenna should not exceed a width of 1.5 mm, otherwise the Q-factor of the

loop antenna is too high.

1 (≈ 50 nH to 100 nH) can be printed on PCB. C4 should be selected so the XTO runs

on the load resonance frequency of the crystal. Normally, a value of 12 pF results for a

15 pF load-capacitance crystal.

ANT2

ANT1

Rin

Power

meter

1 = 1n

1 = 33n

2 = 2.2p

Lopt

Z = 50

Ω

T48C862-R4 数据表(PDF) 8 Page - ATMEL Corporation

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