T48C862-R4 datasheet(44/107 Pages) ATMEL

44 / 107 page

T48C862-R4 [Preliminary]

4551C–4BMCU–01/04

Timer 2

8-/12-bit Timer for:

•

Interrupt, square-wave, pulse and duty cycle generation

•

Baud-rate generation for the internal shift register

•

Manchester and Biphase modulation together with the SSI

•

Carrier frequency generation and modulation together with the SSI

Timer 2 can be used as an interval timer for interrupt generation, as signal generator or

as baud-rate generator and modulator for the serial interface. It consists of a 4-bit and

an 8-bit up counter stage which both have compare registers. The 4-bit counter stages

of Timer 2 are cascadable as a 12-bit timer or as an 8-bit timer with 4-bit prescaler. The

timer can also be configured as an 8-bit timer and a separate 4-bit prescaler.

The Timer 2 input can be supplied via the system clock, the external input clock (T2I),

the Timer 1 output clock, the Timer 3 output clock or the shift clock of the serial inter-

face. The external input clock T2I is not synchronized with SYSCL. Therefore, it is

possible to use Timer 2 with a higher clock speed than SYSCL. Furthermore, with that

input clock the Timer 2 operates in the power-down mode SLEEP (CPU core -> sleep

and OSC-Stop -> yes) as well as in the POWER-DOWN (CPU core -> sleep and OSC-

Stop -> no). All other clock sources supplied no clock signal in SLEEP. The 4-bit counter

stages of Timer 2 have an additional clock output (POUT).

Its output has a modulator stage that allows the generation of pulses as well as the gen-

eration and modulation of carrier frequencies. The Timer 2 output can modulate with the

shift register data output to generate Biphase- or Manchester code.

If the serial interface is used to modulate a bitstream, the 4-bit stage of Timer 2 has a

special task. The shift register can only handle bitstream lengths divisible by 8. For other

lengths, the 4-bit counter stage can be used to stop the modulator after the right bit-

count is shifted out.

If the timer is used for carrier frequency modulation, the 4-bit stage works together with

an additional 2-bit duty cycle generator like a 6-bit prescaler to generate carrier fre-

quency and duty cycle. The 8-bit counter is used to enable and disable the modulator

output for a programmable count of pulses.

For programming the time interval, the timer has a 4-bit and an 8-bit compare register.

For programming the timer function, it has four mode and control registers. The compar-

ator output of stage 2 is controlled by a special compare mode register (T2CM). This

which can be triggered by a compare match event or the counter overflow. This archi-

tecture enables the timer function for various modes.

The Timer 2 has a 4-bit compare register (T2CO1) and an 8-bit compare register

(T2CO2). Both these compare registers are cascadable as a 12-bit compare register, or

8-bit compare register and 4-bit compare register.

For 12-bit compare data value: m = x +1

≤x ≤4095

For 8-bit compare data value: n = y +1

≤y ≤255

For 4-bit compare data value: l = z +1

≤z ≤15

T48C862-R4 数据表(PDF) 44 Page - ATMEL Corporation

T48C862-R4 数据表(HTML) 44 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载