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T48C862-R4 数据表(PDF) 59 Page - ATMEL Corporation |
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T48C862-R4 数据表(HTML) 59 Page - ATMEL Corporation |
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59 / 107 page ![]() 59 T48C862-R4 [Preliminary] 4551C–4BMCU–01/04 Timer 3 – Mode 7: Carrier Frequency Burst Modulation Controlled by SSI Internal Output (SO) The Timer 3 counter is driven by an internal or external clock source. Its compare- and compare mode registers must be programmed to generate the carrier frequency via the output toggle flip-flop. The output (SO) of the SSI is used to enable or disable the Timer 3 output. The SSI should be supplied with the toggle signal of Timer 2 (see “Combina- tion Mode 12: Burst Modulation 2” on page 88). Timer 3 – Mode 8: FSK Modulation with Shift Register Data (SO) The two compare registers are used for generating two different time intervals. The SSI internal data output (SO) selects which compare register is used for the output fre- quency generation. A "0" level at the SSI data output enables the compare register 1. A "1" level enables compare register 2. The compare- and compare-mode registers must be programmed to generate the two frequencies via the output toggle flip-flop. The SSI can be supplied with the toggle signal of Timer 2. The Timer 3 counter is driven by an internal or external clock source. The Timer 2 counter is driven by the Counter 3 (TOG3) (see “Combination Mode 13: FSK Modulation” on page 88). Figure 57. FSK Modulation Timer 3 – Mode 9: Pulse-width Modulation with the Shift Register The two compare registers are used for generating two different time intervals. The SSI internal data output (SO) selects which compare register is used for the output pulse generation. In this mode both compare- and compare-mode registers must be pro- grammed for generating the two pulse widths. It is also useful to enable the single-action mode for extreme duty cycles. Timer 2 is used as baudrate generator and for the trigger restart of Timer 3. The SSI must be supplied with a toggle signal of Timer 2. The counter is driven by an internal or external clock source (see “Combination Mode 7: Pulse-width Modulation (PWM)” on page 83). Figure 58. Pulse-width Modulation 012340 1 23401 2 3 Counter 3 CM31 CM32 SO 40 1 2 0 1 2012 0 120 1 201201 20 1 2 3 T3R 40 T3O 1 01 0 000 00 00 00 000 0 Counter 3 CM31 CM32 T3O 00 0 001 234 56 7 8 9 1011121314150 12 345 TOG2 67 8 1 91112 10 14 13 0 2 3 14 15 0 0 0 1 SIR SO SCO T3R |
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