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T48C862-R4 数据表(PDF) 13 Page - ATMEL Corporation |
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T48C862-R4 数据表(HTML) 13 Page - ATMEL Corporation |
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13 / 107 page ![]() 13 T48C862-R4 [Preliminary] 4551C–4BMCU–01/04 Microcontroller Block Features • 4-Kbyte ROM, 256 x 4-bit RAM • EEPROM Programmable Options • Read Protection for the EEPROM Program Memory • 11 Bi-directional I/Os • Up to Seven External/Internal Interrupt Sources • Eight Hardware and Software Interrupt Priorities • Multifunction Timer/Counter - IR Remote Control Carrier Generator - Biphase-, Manchester- and Pulse-width Modulator and Demodulator - Phase Control Function • Programmable System Clock with Prescaler and Five Different Clock Sources • Very Low Sleep Current (< 1 µA) • 2 × 512-bit EEPROM Data Memory • 256 × 4-bit RAM Data Memory • Synchronous Serial Interface (2-wire, 3-wire) • Watchdog, POR and Brown-out Function • Voltage Monitoring Inclusive Lo_BAT Detect Description The microcontroller is designed with EEPROM cells so it can be programmed several times. To offer full compatibility with each ROM version, the I/O configuration is stored into a separate internal EEPROM block during programming. The configuration is down- loaded to the I/Os with every power-on reset. Introduction The microcontroller block is a member of Atmel’s family of 4-bit single-chip microcontrol- lers. Instead of ROM it contains EEPROM, RAM, parallel I/O ports, two 8-bit programmable multifunction timer/counters, voltage supervisor, interval timer with watchdog function and a sophisticated on-chip clock generation with integrated RC-, 32-kHz and 4-MHz crystal oscillators. Differences between T48C862-R4 and ATAR862 Microcontrollers Program Memory The program memory of the devices is realized as an EEPROM. The memory size for user programs is 4096 bytes. It is programmed as 258 × 16 bytes blocks of data. the implement LOCK-bit function is user-selectable and protects the device from unautho- rized read-out of the program memory. Configuration Memory An additional area of 32 bytes of the EEPROM is used to store information about the hardware configuration. All the options that are selectable for the ROM versions are available to the user. This includes not only the different port options but also the possi- bilities to select different capacitors for OSC1 and OSC2, the option to enable or disable the hardlock for the watchdog, the option to select OSC2 instead of OSC1 as external clock input and the option to enable the external clock monitor as a reset source. Data Memory The microcontroller block contains an internal data EEPROM that is organized as two pages of 32 × 16-bit. To be compatible with the ROM parts, the page used has to be defined within the application software by writing the 2-wire interface (TWI) command "09h" to the EEPROM. This command has no effect for the microcontroller block, if it is left inside the HEX-file for the ROM version. Also for compatibility reasons, the access to the EEPROM is handled via the MCL (serial interface) as in the corresponding ROM parts. |
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