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CS5535 数据表(PDF) 356 Page - National Semiconductor (TI) |
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CS5535 数据表(HTML) 356 Page - National Semiconductor (TI) |
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356 / 555 page ![]() www.national.com 356 Revision 0.8 SMB Controller Register Descriptions (Continued) 5.11.1.3 SMB Control Status (SMB_CTRL_STS) This register configures and controls the SMB functional block. It maintains the current SMB status and controls several SMB functions. On reset and when the SMB is disabled, the non-reserved bits of SMBCST are cleared. SMB I/O Offset 02h Type R/W Reset Value 10h SMB_CTRL_STS Register Map 76 54 32 10 RSVD TGSCL TSDA GCMTCH MATCH BB BUSY SMB_CTRL_STS Bit Descriptions Bit Name Description 7:6 RSVD Reserved. Reads return 0; writes have no effect. 5TGSCL Toggle SMB_CLK Line. Enables toggling the SMB_CLK line during error recovery. 0: Clock toggle completed. 1: When the SMB_DATA line is low, writing 1 to this bit toggles the SMB_CLK line for one cycle. Writing 1 to TGSCL while SMB_DATA is high is ignored. 4 TSDA (RO) Test SMB_DATA Line (Read Only). This bit reads the current value of the SMB_DATA line. It can be used while recovering from an error condition in which the SMB_DATA line is constantly pulled low by an out-of-sync slave. Data written to this bit is ignored. 3 GCMTCH (RO) Global Call Match (Read Only). 0: Start condition or Repeated Start and a Stop condition (including Illegal Start or Stop condition). 1: In slave mode, GCMEN (SMB I/O Offset 03h[5]) is set and the address byte (the first byte transferred after a Start condition) is 00h. 2 MATCH (RO) Address Match (Read Only). 0: Start condition or Repeated Start and a Stop condition (including Illegal Start or Stop condition). 1: SAEN (SMB I/O Offset 04h[7]) is set and the first 7 bits of the address byte (the first byte transferred after a Start condition) match the 7-bit address in the SMBADR (SMB I/O Offset 04h[6:0]). 1 BB (R/W1C) Bus Busy (Read/Write 1 to Clear). 0: Writing 1, SMB disabled, or Stop condition detected. 1: Bus active (a low level on either SMB_DATA or SMB_CLK), or Start condition. 0 BUSY (RO) Busy (Read Only). This bit indicates the SMB is either in slave transmit/receive or master transmit/receive mode, or if there is an arbitration going on the bus. 0: SMB disabled or SMbus in Idle mode 1: SMB is in one of the following states: -Generating a Start condition. -Detects a Start condition. -Master mode (MASTER (SMB I/O Offset 01h[1]) is set). -Slave mode (MATCH (bit 2) or GCMTCH (bit 3) are set). |
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