| 数据搜索系统,热门电子元器件搜索 |
|
TDA4VEN...Q1 数据表(PDF) 32 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
TDA4VEN...Q1 数据表(HTML) 32 Page - Texas Instruments |
|
32 / 236 page ![]() Table 5-1. Pin Attributes (AMW Package) (continued) BALL NUMBER [1] BALL NAME [2] PADCONFIG Register [15] PADCONFIG Address [16] SIGNAL NAME [3] MUX MODE [4] TYPE [5] DSIS [6] BALL STATE DURING RESET (RX/TX/PULL) [7] BALL STATE AFTER RESET (RX/TX/PULL) [8] MUX MODE AFTER RESET [9] I/O OPERATING VOLTAGE [10] POWER [11] HYS [12] BUFFER TYPE [13] PULL UP/DOWN TYPE [14] AB19 OLDI0_A7N PADCONFIG PADCONFIG166 0x000F4298 OLDI0_A7N 0 IO 0 Off / Off / NA Off / Off / NA 0 1.8 V VDDA_1P8_OLDI0 MLB_LVDS GPIO1_67 7 IO pad AA20 OLDI0_A7P PADCONFIG PADCONFIG165 0x000F4294 OLDI0_A7P 0 IO 0 Off / Off / NA Off / Off / NA 0 1.8 V VDDA_1P8_OLDI0 MLB_LVDS GPIO1_66 7 IO pad AF21 OLDI0_CLK0N PADCONFIG PADCONFIG168 0x000F42A0 OLDI0_CLK0N 0 IO 0 Off / Off / NA Off / Off / NA 0 1.8 V VDDA_1P8_OLDI0 MLB_LVDS GPIO1_69 7 IO pad AE20 OLDI0_CLK0P PADCONFIG PADCONFIG167 0x000F429C OLDI0_CLK0P 0 IO 0 Off / Off / NA Off / Off / NA 0 1.8 V VDDA_1P8_OLDI0 MLB_LVDS GPIO1_68 7 IO pad AD20 OLDI0_CLK1N PADCONFIG PADCONFIG170 0x000F42A8 OLDI0_CLK1N 0 IO 0 Off / Off / NA Off / Off / NA 0 1.8 V VDDA_1P8_OLDI0 MLB_LVDS GPIO1_71 7 IO pad AE19 OLDI0_CLK1P PADCONFIG PADCONFIG169 0x000F42A4 OLDI0_CLK1P 0 IO 0 Off / Off / NA Off / Off / NA 0 1.8 V VDDA_1P8_OLDI0 MLB_LVDS GPIO1_70 7 IO pad L24 OSPI0_CLK PADCONFIG PADCONFIG0 0x000F4000 OSPI0_CLK 0 O Off / Off / Off Off / Off / Off 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD GPIO0_0 7 IO pad L22 OSPI0_DQS PADCONFIG PADCONFIG2 0x000F4008 OSPI0_DQS 0 I 0 Off / Off / Off Off / Off / Off 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD UART5_CTSn 5 I 1 GPIO0_2 7 IO pad L23 OSPI0_LBCLKO PADCONFIG PADCONFIG1 0x000F4004 OSPI0_LBCLKO 0 IO 0 Off / Off / Off Off / Off / Off 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD UART5_RTSn 5 O GPIO0_1 7 IO pad K26 OSPI0_CSn0 PADCONFIG PADCONFIG11 0x000F402C OSPI0_CSn0 0 O Off / Off / Off Off / Off / Off 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD GPIO0_11 7 IO pad K23 OSPI0_CSn1 PADCONFIG PADCONFIG12 0x000F4030 OSPI0_CSn1 0 O Off / Off / Off Off / Off / Off 7 1.8 V/3.3 V VDDSHV1 Yes LVCMOS PU/PD GPIO0_12 7 IO pad TDA4VEN-Q1, TDA4AEN-Q1 SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024 www.ti.com 32 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |