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TDA4VEN...Q1 数据表(PDF) 54 Page - Texas Instruments

部件名 TDA4VEN...Q1
功能描述  TDA4VEN, TDA4AEN Jacinto™ Processors
PDF  236 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4VEN...Q1 数据表(HTML) 54 Page - Texas Instruments

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Table 5-17. Trace Signal Descriptions (continued)
SIGNAL NAME [1]
PIN TYPE
[2]
DESCRIPTION [3]
AMW PIN [4]
TRC_CTL
O
Trace Control
R23
TRC_DATA0
O
Trace Data 0
R26
TRC_DATA1
O
Trace Data 1
T27
TRC_DATA2
O
Trace Data 2
T25
TRC_DATA3
O
Trace Data 3
T24
TRC_DATA4
O
Trace Data 4
T21
TRC_DATA5
O
Trace Data 5
T22
TRC_DATA6
O
Trace Data 6
T23
TRC_DATA7
O
Trace Data 7
N21
TRC_DATA8
O
Trace Data 8
N22
TRC_DATA9
O
Trace Data 9
N23
TRC_DATA10
O
Trace Data 10
P27
TRC_DATA11
O
Trace Data 11
P26
TRC_DATA12
O
Trace Data 12
V21
TRC_DATA13
O
Trace Data 13
N24
TRC_DATA14
O
Trace Data 14
N25
TRC_DATA15
O
Trace Data 15
R27
TRC_DATA16
O
Trace Data 16
P21
TRC_DATA17
O
Trace Data 17
P22
TRC_DATA18
O
Trace Data 18
P23
TRC_DATA19
O
Trace Data 19
V23
TRC_DATA20
O
Trace Data 20
V22
TRC_DATA21
O
Trace Data 21
V24
TRC_DATA22
O
Trace Data 22
V26
TRC_DATA23
O
Trace Data 23
V25
5.3.8.2 MCU Domain
Table 5-18. JTAG Signal Descriptions
SIGNAL NAME [1]
PIN TYPE
[2]
DESCRIPTION [3]
AMW PIN [4]
EMU0
IO
Emulation Control 0
C9
EMU1
IO
Emulation Control 1
F9
TCK
I
JTAG Test Clock Input
A11
TDI
I
JTAG Test Data Input
E12
TDO
OZ
JTAG Test Data Output
F10
TMS
I
JTAG Test Mode Select Input
F11
TRSTn
I
JTAG Reset
B10
5.3.9 EPWM
5.3.9.1 MAIN Domain
Table 5-19. EPWM Signal Descriptions
SIGNAL NAME [1]
PIN TYPE
[2]
DESCRIPTION [3]
AMW PIN [4]
EHRPWM_SOCA
O
EHRPWM Start of Conversion A
D23
EHRPWM_SOCB
O
EHRPWM Start of Conversion B
B22
TDA4VEN-Q1, TDA4AEN-Q1
SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024
www.ti.com
54
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Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1



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