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TDA4VEN...Q1 数据表(PDF) 74 Page - Texas Instruments |
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TDA4VEN...Q1 数据表(HTML) 74 Page - Texas Instruments |
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74 / 236 page  Table 5-65. System Signal Descriptions (continued) SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMW PIN [4] CLKOUT0 O RMII Clock Output (50 MHz). This pin is used for clock source to the external RMII PHY and must also be routed back to the respective RMII[x]_REF_CLK pin for proper device operation. A23, AA22, AF24 EXTINTn I External Interrupt B23 EXT_REFCLK1 I External clock input to Main Domain A23 MAIN_ERRORn IO Error signal output from MAIN Domain ESM B25, C20, N25 OBSCLK0 O Main Domain Observation clock output for test and debug purposes only V27 OBSCLK1 O Main Domain Observation clock output for test and debug purposes only D23 PORz_OUT O Main Domain POR status output D27 RESETSTATz O Main Domain warm reset status output E27 RESET_REQz I Main Domain external warm reset request input E26 SYNC0_OUT O CPTS Time Stamp Generator Bit 0 Output from Time Sync Router D23 SYNC1_OUT O CPTS Time Stamp Generator Bit 1 Output from Time Sync Router A23 SYNC2_OUT O CPTS Time Stamp Generator Bit 2 Output from Time Sync Router D22 SYNC3_OUT O CPTS Time Stamp Generator Bit 3 Output from Time Sync Router C22 SYSCLKOUT0 O Main Domain system clock output (divided by 4) for test and debug purposes only A23 5.3.24.3.2 MCU Domain Table 5-66. MCU System Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMW PIN [4] MCU_ERRORn IO Error signal output from MCU Domain ESM B7 MCU_EXT_REFCLK0 I External input to MCU Domain A10, C1 MCU_OBSCLK0 O MCU Domain Observation clock output for test and debug purposes only A10 MCU_PORz I MCU and Main Domain cold reset E8 MCU_RESETSTATz O MCU Domain warm reset status output E13 MCU_RESETz I MCU and Main Domain warm reset D10 MCU_SYSCLKOUT0 O MCU Domain system clock output (divided by 4) for test and debug purposes only A10 5.3.24.3.3 WKUP Domain Table 5-67. WKUP System Signal Descriptions SIGNAL NAME [1] PIN TYPE [2] DESCRIPTION [3] AMW PIN [4] PMIC_LPM_EN0 O Dual-function PMIC control output, Low Power Mode (active low) or PMIC Enable (active high) A8 WKUP_CLKOUT0 O WKUP Domain CLKOUT0 output F12 TDA4VEN-Q1, TDA4AEN-Q1 SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024 www.ti.com 74 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1 |
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