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TDA4VEN...Q1 数据表(PDF) 44 Page - Texas Instruments

部件名 TDA4VEN...Q1
功能描述  TDA4VEN, TDA4AEN Jacinto™ Processors
PDF  236 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4VEN...Q1 数据表(HTML) 44 Page - Texas Instruments

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Table 5-1. Pin Attributes (AMW Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL STATE
DURING
RESET
(RX/TX/PULL) [7]
BALL STATE
AFTER
RESET
(RX/TX/PULL) [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
AA22
VOUT0_DATA13
PADCONFIG
PADCONFIG59
0x000F40EC
VOUT0_DATA13
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
GPMC0_A13
1
OZ
RGMII2_TD3
2
O
CLKOUT0
3
O
UART5_CTSn
4
I
1
MCASP4_AXR1
6
IO
0
GPIO0_58
7
IO
pad
AB26
VOUT0_DATA14
PADCONFIG
PADCONFIG60
0x000F40F0
VOUT0_DATA14
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
GPMC0_A14
1
OZ
RGMII2_RX_CTL
2
I
0
RMII2_RX_ER
3
I
0
UART4_RTSn
4
O
MCASP4_AXR2
6
IO
0
GPIO0_59
7
IO
pad
AB27
VOUT0_DATA15
PADCONFIG
PADCONFIG61
0x000F40F4
VOUT0_DATA15
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV3
Yes
LVCMOS
PU/PD
GPMC0_A15
1
OZ
RGMII2_RXC
2
I
0
RMII2_REF_CLK
3
I
0
UART4_CTSn
4
I
1
MCASP4_AXR3
6
IO
0
GPIO0_60
7
IO
pad
G9
VPP
VPP
PWR
TDA4VEN-Q1, TDA4AEN-Q1
SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024
www.ti.com
44
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Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1



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