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TDA4VEN...Q1 数据表(PDF) 23 Page - Texas Instruments

部件名 TDA4VEN...Q1
功能描述  TDA4VEN, TDA4AEN Jacinto™ Processors
PDF  236 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4VEN...Q1 数据表(HTML) 23 Page - Texas Instruments

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Table 5-1. Pin Attributes (AMW Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL STATE
DURING
RESET
(RX/TX/PULL) [7]
BALL STATE
AFTER
RESET
(RX/TX/PULL) [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
A22
I2C1_SDA
PADCONFIG
PADCONFIG123
0x000F41EC
I2C1_SDA
0
IOD
1
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
UART1_TXD
1
O
TIMER_IO1
2
IO
0
SPI2_CLK
3
IO
0
EHRPWM0_SYNCO
4
O
GPIO1_29
7
IO
pad
EHRPWM2_B
8
IO
0
MMC2_SDWP
9
I
0
C22
MCAN0_RX
PADCONFIG
PADCONFIG119
0x000F41DC
MCAN0_RX
0
I
1
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
UART5_TXD
1
O
TIMER_IO3
2
IO
0
SYNC3_OUT
3
O
UART1_RIn
4
I
1
EQEP2_S
5
IO
0
I2C4_SDA
6
IOD
1
GPIO1_25
7
IO
pad
MCASP2_AXR1
8
IO
0
EHRPWM_TZn_IN4
9
I
0
D22
MCAN0_TX
PADCONFIG
PADCONFIG118
0x000F41D8
MCAN0_TX
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
UART5_RXD
1
I
1
TIMER_IO2
2
IO
0
SYNC2_OUT
3
O
UART1_DTRn
4
O
EQEP2_I
5
IO
0
I2C4_SCL
6
IOD
1
GPIO1_24
7
IO
pad
MCASP2_AXR0
8
IO
0
EHRPWM_TZn_IN3
9
I
0
F24
MCASP0_ACLKR
PADCONFIG
PADCONFIG108
0x000F41B0
MCASP0_ACLKR
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
SPI2_CLK
1
IO
0
UART1_TXD
2
O
EHRPWM0_B
6
IO
0
GPIO1_14
7
IO
pad
EQEP1_I
8
IO
0
www.ti.com
TDA4VEN-Q1, TDA4AEN-Q1
SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024
Copyright © 2024 Texas Instruments Incorporated
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Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1



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