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TDA4VEN...Q1 数据表(PDF) 34 Page - Texas Instruments

部件名 TDA4VEN...Q1
功能描述  TDA4VEN, TDA4AEN Jacinto™ Processors
PDF  236 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TDA4VEN...Q1 数据表(HTML) 34 Page - Texas Instruments

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Table 5-1. Pin Attributes (AMW Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL STATE
DURING
RESET
(RX/TX/PULL) [7]
BALL STATE
AFTER
RESET
(RX/TX/PULL) [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
N27
OSPI0_D6
PADCONFIG
PADCONFIG9
0x000F4024
OSPI0_D6
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
SPI1_D0
1
IO
0
MCASP1_ACLKX
2
IO
0
UART6_RTSn
3
O
GPIO0_9
7
IO
pad
M27
OSPI0_D7
PADCONFIG
PADCONFIG10
0x000F4028
OSPI0_D7
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV1
Yes
LVCMOS
PU/PD
SPI1_D1
1
IO
0
MCASP1_AFSX
2
IO
0
UART6_CTSn
3
I
1
GPIO0_10
7
IO
pad
F25
PCIE0_CLKREQn
PADCONFIG
PADCONFIG171
0x000F42AC
PCIE0_CLKREQn
0
IOD
0
On / Low / NA
On / SS / NA
0
1.8 V/3.3 V
VDDSHV0
Yes
I2C OPEN
DRAIN
GPIO1_72
7
IOD
pad
A8
PMIC_LPM_EN0
PADCONFIG
MCU_PADCONFIG32
0x04084080
PMIC_LPM_EN0
0
O
Off / Off / Off
Off / SS / Off
0
1.8 V/3.3 V
VDDSHV_CANUART
Yes
LVCMOS
PU/PD
MCU_GPIO0_22
7
IO
pad
D27
PORz_OUT
PADCONFIG
PADCONFIG148
0x000F4250
PORz_OUT
0
O
Off / Low / Off
Off / SS / Off
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
E27
RESETSTATz
PADCONFIG
PADCONFIG147
0x000F424C
RESETSTATz
0
O
Off / Low / Off
Off / SS / Off
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
E26
RESET_REQz
PADCONFIG
PADCONFIG146
0x000F4248
RESET_REQz
0
I
On / Off / Up
On / Off / Up
0
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
AE27
RGMII1_RXC
PADCONFIG
PADCONFIG82
0x000F4148
RGMII1_RXC
0
I
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
RMII1_REF_CLK
1
I
0
GPIO0_80
7
IO
pad
AD23
RGMII1_RX_CTL
PADCONFIG
PADCONFIG81
0x000F4144
RGMII1_RX_CTL
0
I
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
RMII1_RX_ER
1
I
0
GPIO0_79
7
IO
pad
AG26
RGMII1_TXC
PADCONFIG
PADCONFIG76
0x000F4130
RGMII1_TXC
0
O
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
RMII1_CRS_DV
1
I
0
GPIO0_74
7
IO
pad
TDA4VEN-Q1, TDA4AEN-Q1
SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024
www.ti.com
34
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Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: TDA4VEN-Q1 TDA4AEN-Q1



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