TMP86FS49AIUG datasheet(227/296 Pages) TOSHIBA

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Page 211

TMP86FS49AIUG

17. 10-bit AD Converter (ADC)

The TMP86FS49AIUG have a 10-bit successive approximation type AD converter.

17.1 Configuration

The circuit configuration of the 10-bit AD converter is shown in Figure 17-1.

It consists of control register ADCCR1 and ADCCR2, converted value register ADCDR1 and ADCDR2, a DA

converter, a sample-hold circuit, a comparator, and a successive comparison circuit.

Note: Before using AD converter, set appropriate value to I/O port register conbining a analog input port. For details, see the sec-

tion on "I/O ports".

Figure 17-1 10-bit AD Converter

AINDS

R/2

ACK

AMD

AD conversion result register 1, 2

AD converter control register 1, 2

ADBF

EOCF

INTADC

SAIN

Successive approximate circuit

ADCCR2

ADCDR1

ADCDR2

ADCCR1

Sample hold

circuit

S EN

Shift clock

DA converter

Analog input

multiplexer

Reference

voltage

Analog

comparator

Control circuit

VSS

VAREF

AVDD

AIN0

AIN15

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