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ST40RA 数据表(PDF) 81 Page - STMicroelectronics |
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ST40RA 数据表(HTML) 81 Page - STMicroelectronics |
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81 / 94 page  A Interconnect architecture ST40RA 81/94 STMicroelectronics ADCS 7260755H A.2.1 LMI1 arbiter 0x230 EMI_LATENCY_GPDMA Defines priority and latency value for GPDMA initiator in the EMI arbiter, see EMI arbiter on page 83 0x310 LATENCY_PCI_ENABLE Enables or disables initiators latency counters, see PCI arbiter on page 84 0x318 PCI_CPU_PRI Defines priority for the CPU in the PCI arbiter, see PCI arbiter on page 84 0x320 PCI_LATENCY_PCI Defines priority and latency value for PCI initiator in the PCI arbiter, see PCI arbiter on page 84 0x328 PCI_LATENCY_EMPI Defines priority and latency value for EMPI initiator in the PCI arbiter, see PCI arbiter on page 84 0x330 PCI_LATENCY_GPDMA Defines priority and latency value for GPDMA initiator in the PCI arbiter, see PCI arbiter on page 84 0x410 LATENCY_PER_ENABLE Enables or disables initiators latency counters, see Peripheral arbiter on page 85 0x418 PER_CPU_PRI Defines priority for the CPU in the peripheral arbiter, see Peripheral arbiter on page 85 0x420 PER_LATENCY_PCI Defines priority and latency value for PCI initiator in the peripheral arbiter, see Peripheral arbiter on page 85 0x428 PER_LATENCY_EMPI Defines priority and latency value for EMPI initiator in the peripheral arbiter, see Peripheral arbiter on page 85 0x430 PER_LATENCY_GPDMA Defines priority and latency value for GPDMA initiator in the peripheral arbiter, see Peripheral arbiter on page 85 LATENCY_LMI1_ENABLE LMI1 arbiter: enable latency counters 0x010 0 Reserved Reset: Always 0 1 ENABLE_1 Enable latency check for node 2 Reset: 0 RW [31:2] Reserved Reset: Always 0 LMI1_CPU_PRI LMI1 arbiter: CPU priority 0x018 [3:0] CPU_PRIORITY Defines priority for CPU Reset: 0x1 RW [31:4] Reserved LATENCY_LMI1_VALUE LMI1 arbiter: node 2 intitiator priority and latency 0x020 [3:0] NODE2_PRIORITY Defines priority for node 2 initiators Reset: 0x0 RW [15:4] Reserved Address offset Name Function Table 38: Interconnect register summary |
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