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ST40RA 数据表(PDF) 51 Page - STMicroelectronics |
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ST40RA 数据表(HTML) 51 Page - STMicroelectronics |
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51 / 94 page  7 Electrical specifications ST40RA 51/94 STMicroelectronics ADCS 7260755H 7.4 LMI interface (SDRAM) AC specifications Figure 11: LMI SDRAM mode timings Symbol Parameter Min Max Units Note tLCHLCH LMI clock period 10 ns tLCHLCL LMI clock high time 0.45 tLCHLCH tLCLLCH LMI clock low period 0.45 tLCHLCH tLCHLOV LCLKOUT low to output signals valid -2 2 ns tLCHLOZ LCLKOUT high to outputs tri-state 0 2 ns tLCHLON LCLKOUT high to outputs on -2 ns tLIVLCH Input signals valid to LCLKOUT high 2 ns tLCHLIX Input signals hold after LCLKOUT high 2 ns Table 26: LMI SDRAM AC timings Tri-state outputs LCLKOUTA Outputs tLCLLOV tLCHLON tLCHLOZ Inputs tLCHLIX tLIVLCH tLCHLCH tLCHLCL tLCLLCH LCLKOUTB |
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