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ST40RA 数据表(PDF) 56 Page - STMicroelectronics |
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ST40RA 数据表(HTML) 56 Page - STMicroelectronics |
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56 / 94 page  ADCS 7260755H STMicroelectronics 56/94 ST40RA 7 Electrical specifications 7.9 System CLKIN AC specifications The timings referenced in Figure 16 refer to the case where CLKIN is directly clocked from an external source. In this case care should be taken that the total load on the CLOCKOSC output is <2pF. Symbol Parameter Min Nom Max Units Notes tCLCH CLKIN pulse width low 6 ns tCHCL CLKIN pulse width high 6 ns tCLCL CLKIN period 27 MHz a a. Measured between corresponding points on consecutive falling edges. tCr CLKIN rise time 10 ns b, c b. When driven by an external clock. c. Clock transitions must be monotonic within the range VIH to VIL. tCf CLKIN fall time 10 ns 2, 3 Table 30: CLKIN timings Figure 16: CLKIN timings VDDCORE * 0.8 VDDCORE * 0.5 VDDCORE * 0.2 tCLCH tCHCL tCLCL 90% 10% tCf 90% 10% tCr |
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