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ST40RA 数据表(PDF) 85 Page - STMicroelectronics |
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ST40RA 数据表(HTML) 85 Page - STMicroelectronics |
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85 / 94 page  A Interconnect architecture ST40RA 85/94 STMicroelectronics ADCS 7260755H A.2.5 Peripheral arbiter PCI_LATENCY_EMPI PCI arbiter: EMPI intitiator priority and latency 0x328 [3:0] EMPI_PRIORITY Defines priority for EMPI Reset: 0x2 RW [15:4] Reserved [23:16] EMPI_LATENCY Defines maximum accepted latency for EMPI Reset: 0x00 RW [31:24] Reserved PCI_LATENCY_GPDMA PCI arbiter: GPDMA intitiator priority and latency 0x330 [3:0] GPDMA_PRIORITY Defines priority for GPDMA Reset: 0x1 RW [15:4] Reserved [23:16] GPDMA_LATENCY Defines maximum accepted latency for GPDMA Reset: 0x00 RW [31:24] Reserved LATENCY_PER_ENABLE Peripheral arbiter: enable latency counters 0x410 0 Reserved Reset: Always 0 1 ENABLE_PCI Enable latency check for PCI Reset: 0 RW 2 ENABLE_EMPI Enable latency check for EMPI Reset: 0 RW 3 ENABLE_GPDMA Enable latency check for GPDMA Reset: 0 RW [31:4] Reserved Reset: Always 0 PER_CPU_PRI Peripheral arbiter: CPU priority 0x418 [3:0] CPU_PRIORITY Defines priority for CPU Reset: 0x3 RW [31:4] Reserved PER_LATENCY_PCI Peripheral arbiter: PCI intitiator priority and latency 0x420 [3:0] PCI_PRIORITY Defines priority for PCI Reset: 0x2 RW [15:4] Reserved |
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