 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
ST40RA 数据表(PDF) 21 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST40RA 数据表(HTML) 21 Page - STMicroelectronics |
|
|
21 / 94 page  5 System configuration ST40RA 21/94 STMicroelectronics ADCS 7260755H 5.8 Memory bridge control The architecture of the SuperHyway interconnect is shown in Figure 3. Initiators are shown on the left, and targets are shown on the right of the interconnect. The bit width of the initiator and target ports are shown in the diagram. The ST40RA architecture requires seven memory bridges on clock change boundaries. Figure 3: ST40RA interconnect architecture Memory bridge number SuperHyway type Subsystem 1 T3 EMI target 2 T3 EMPI initiator 3 T1 EMI_SS target 4 T2 Reserved 5 T2 Reserved 6T3 PCI_ST_I 7T3 PCI_ST_T Table 9: Memory bridges SuperHyway Interconnect SH core EMPI PCI_ST_I LMI EMI PCI_ST_T Memory bridge Memory bridge Memory bridge Memory bridge P I PER SH_PER 32 32 32 GPDMA 32 64 32 32 32 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
