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ST40RA 数据表(PDF) 54 Page - STMicroelectronics |
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ST40RA 数据表(HTML) 54 Page - STMicroelectronics |
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54 / 94 page  ADCS 7260755H STMicroelectronics 54/94 ST40RA 7 Electrical specifications 7.7 General purpose peripheral bus (EMI) AC specifications Figure 14: EMI AC timings Symbol Parameter Min Max Units Note tECHECH EMI reference clock period 12 ns a a. EMI reference clock is defined as the time when ECLKOUT, MCLKOUT and FCLKOUT are all valid. tECHECL EMI reference clock high time 4 ns tECLECH EMI reference clock low period 4 ns tECHCH EMI reference clock high to all clocks high 3 6 ns tECLCL EMI reference clock low to all clocks low 3 6 ns tECHEOV EMI reference clock high to output signals valid 0 2 ns tECLEOV EMI reference clock low to output signals valid 0 2 ns 1 tECHEOZ EMI reference clock high to outputs tri-state 4 ns tECHEON EMI reference clock high to outputs on ns 1 tEIVECH Input signals valid to EMI reference clock high 4 ns b b. Including EWAIT signal tECHEIX Input signals hold after EMI reference clock high 2 ns 2 Table 28: EMI AC timings Tri-state outputs Outputs switched on full cycle tECHLON tECHLOZ Inputs tECHEIX tECHECH tECHECL tRCLRCH tECHEOV tEIVECH Outputs switched on 1/2 cycle tECLEOV FCLKOUT tECHCH tECLCL ECLKOUT MCLKOUT |
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