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ST40RA 数据表(PDF) 16 Page - STMicroelectronics |
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ST40RA 数据表(HTML) 16 Page - STMicroelectronics |
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16 / 94 page ![]() ADCS 7260755H STMicroelectronics 16/94 ST40RA 5 System configuration 5.3.2 ST40 standard system interrupt allocation Standard ST40 family interrupts are mapped as shown in Table 4. RTC ATI 0x480 0 to 15 0 IPRA [3:0] High to low PRI 0x4A0 CUI 0x4C0 SCIF1 ERI 0x4E0 0 to 15 0 IPRB[7:4] High to low RXI 0x500 BRI 0x520 TXI 0x540 SCIF2 ERI 0x700 0 to 15 0 IPRC[7:4] High to low RXI 0x720 BRI 0x740 TXI 0x760 WDT ITI 0x560 0 to 15 0 IPRB[15:12] - Interrupt source INTEVT code Interrupt priority IPR bit numbers Priority within IPR setting unit Value Initial value PCI PCI_SERR_INT 0xA00 0 to 15 0 INTPRI00[0:3] INTPRI00[7:4] High to low PCI_ERR_INT 0xA20 High to low PCI_AD_INT 0xA40 PCI_PWR_DWN 0xA60 Reserved DMAC DMA_INT0 0xB00 0 to 15 0 INTPRI00[11:8] High to low DMA_INT1 0xB20 DMA_INT2 0xB40 DMA_INT3 0xB60 DMA_INT4 0xB80 Reserved DMA_ERR 0xBC0 PIO0 PIO0 0xC00 0 to 15 0 INTPRI00[15:12] - PIO1 PIO1 0xC80 0 to 15 0 INTPRI00[19:16] - PIO2 PIO2 0xD00 0 to 15 0 INTPRI00[23:20] - Table 4: ST40 standard interrupt allocation Interrupt source INTEVT code Interrupt priority IPR bit numbers Priority within IPR setting unit Value Initial value Table 3: ST40 core interrupt allocation (page 2 of 2) |
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