R8CSLASH2G datasheet(241/344 Pages) RENESAS

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R8C/2G Group

18. Serial Interface

Rev.1.00

Apr 04, 2008

Page 221 of 318

REJ09B0387-0100

18.1.1

Polarity Select Function

Figure 18.7 shows the Transfer Clock Polarity. Use the CKPOL bit in the UiC0 (i = 0 or 2) register to select the

transfer clock polarity.

Figure 18.7

Transfer Clock Polarity

18.1.2

LSB First/MSB First Select Function

Figure 18.8 shows the Transfer Format. Use the UFORM bit in the UiC0 (i = 0 or 2) register to select the

transfer format.

Figure 18.8

Transfer Format

CLKi(1)

TXDi

• When the CKPOL bit in the UiC0 register = 0 (output transmit data at the falling

edge and input receive data at the rising edge of the transfer clock)

NOTES:

1. When not transferring, the CLKi pin level is “H”.

2. When not transferring, the CLKi pin level is “L”.

RXDi

CLKi(2)

TXDi

RXDi

• When the CKPOL bit in the UiC0 register = 1 (output transmit data at the rising

edge and input receive data at the falling edge of the transfer clock)

i = 0 or 2

CLKi

TXDi

• When UFORM bit in UiC0 register = 0 (LSB first)(1)

RXDi

CLKi

TXDi

RXDi

• When UFORM bit in UiC0 register = 1 (MSB first)(1)

NOTE:

1. The above applies when the CKPOL bit in the UiC0 register is

set to 0 (output transmit data at the falling edge and input receive

data at the rising edge of the transfer clock).

i = 0 or 2

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