R8CSLASH2G datasheet(252/344 Pages) RENESAS

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R8C/2G Group

19. Hardware LIN

Rev.1.00

Apr 04, 2008

Page 232 of 318

REJ09B0387-0100

Figure 19.3

LINST Register

LIN Status Register

Symbol

Address

After Reset

LINST

0107h

00h

Bit Symbol

Bit Name

Function

Nothing is assigned. If necessary, set to 0.

When read, the content is 0.

B2CLR

SBDCT

BCDCT

B0CLR

B1CLR

When this bit is set to 1, the BCDCT bit is set to 0.

When read, the content is 0.

Synch Break detection flag

Bus collision detection flag

SFDCT bit clear bit

SBDCT bit clear bit

BCDCT bit clear bit

1 show s Synch Break detected or Synch Break

generation completed.

1 show s Bus collision detected.

When this bit is set to 1, the SFDCT bit is set to 0.

When read, the content is 0.

When this bit is set to 1, the SBDCT bit is set to 0.

When read, the content is 0.

b7 b6 b5 b4 b3 b2 b1 b0

—

(b7-b6)

—

1 show s Synch Field measurement completed.

SFDCT

Synch Field measurement-

completed flag

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