R8CSLASH2G datasheet(271/344 Pages) RENESAS

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R8C/2G Group

20. Flash Memory

Rev.1.00

Apr 04, 2008

Page 251 of 318

REJ09B0387-0100

NOTE:

1. When FFh is written in the 2nd byte of the block erase command, the MCU enters read array mode,

and the command code written in the 1st byte is disabled.

Table 20.4

Errors and FMR0 Register Status

FMR0 Register (Status

Error

Error Occurrence Condition

FMR07(SR5) FMR06(SR4)

Command sequence

error

• When a command is not written correctly.

• When D0h or FFh is not written in the 2nd byte

of the block erase command.(1)

• When the program command or block erase

command is executed while rewriting is

disabled by the FMR02 bit in the FMR0 register,

or the FMR15 or FMR16 bit in the FMR1

• When an address not allocated in flash memory

is input during erase command input

• When attempting to erase the block for which

rewriting is disabled during erase command

input.

• When an address not allocated in flash memory

is input during write command input.

• When attempting to write to a block for which

rewriting is disabled during write command

input.

Erase error

• When the block erase command is executed

but auto-erasure does not complete correctly

Program error

• When the program command is executed but

not auto-programming does not complete.

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