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R8C/2G 数据表(PDF) 268 Page - Renesas Technology Corp |
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R8C/2G 数据表(HTML) 268 Page - Renesas Technology Corp |
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268 / 344 page ![]() R8C/2G Group 20. Flash Memory Rev.1.00 Apr 04, 2008 Page 248 of 318 REJ09B0387-0100 20.4 CPU Rewrite Mode In CPU rewrite mode, the user ROM area can be rewritten by executing software commands from the CPU. Therefore, the user ROM area can be rewritten directly while the MCU is mounted on a board without using a ROM programmer. Execute the software command only to blocks in the user ROM area. Table 20.3 lists the Differences between EW0 Mode and EW1 Mode. Table 20.3 Differences between EW0 Mode and EW1 Mode Item EW0 Mode EW1 Mode Operating mode Single-chip mode Single-chip mode Areas in which a rewrite control program can be executed RAM (Rewrite control program is executed after being transferred) User ROM or RAM Areas which can be rewritten User ROM User ROM However, blocks which contain a rewrite control program are excluded Software command restrictions None • Program and block erase commands Cannot be run on any block which contains a rewrite control program • Read status register command Cannot be executed Modes after program or erase Read status register mode Read array mode Modes after read status register Read status register mode Do not execute this command CPU status during auto- write and auto-erase Operating Hold state (I/O ports hold state before the command is executed) Flash memory status detection • Read bits FMR00, FMR06, and FMR07 in the FMR0 register by a program • Execute the read status register command and read bits SR7, SR5, and SR4 in the status register. Read bits FMR00, FMR06, and FMR07 in the FMR0 register by a program CPU clock 5 MHz or below No restriction (on clock frequency to be used) |
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