HD64F2149YV datasheet(383/1075 Pages) RENESAS

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Section 12 8-Bit Timers

Rev. 3.00 Jan 18, 2006 page 355 of 1044

REJ09B0280-0300

TCR

STCR

Bit 2 Bit 1 Bit 0

Bit 1

Bit 0

Channel CKS2 CKS1 CKS0 ICKS1 ICKS0 Description

—

Clock input disabled

(Initial value)

001

—

φ/8 internal clock source, counted on the falling edge

001

—

φ/2 internal clock source, counted on the falling edge

010

—

φ/64 internal clock source, counted on the falling

edge

010

—

φ/32 internal clock source, counted on the falling

edge

011

—

φ/1024 internal clock source, counted on the falling

edge

011

—

φ/256 internal clock source, counted on the falling

edge

—

Counted on TCNT1 overflow signal*

—

Clock input disabled

(Initial value)

001

—

φ/8 internal clock source, counted on the falling edge

001

—

φ/2 internal clock source, counted on the falling edge

010

—

φ/64 internal clock source, counted on the falling

edge

010

—

φ/128 internal clock source, counted on the falling

edge

011

—

φ/1024 internal clock source, counted on the falling

edge

011

—

φ/2048 internal clock source, counted on the falling

edge

—

Counted on TCNT0 compare-match A*

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