HD64F2149YV datasheet(96/1075 Pages) RENESAS

96 / 1075 page

Section 2 CPU

Rev. 3.00 Jan 18, 2006 page 68 of 1044

REJ09B0280-0300

2.8

Processing States

2.8.1

Overview

The CPU has five main processing states: the reset state, exception-handling state, program

execution state, bus-released state, and power-down state. Figure 2.14 shows a diagram of the

processing states. Figure 2.15 indicates the state transitions.

Reset state

The CPU and all on-chip supporting modules have been

initialized and are stopped.

Exception-handling

state

A transient state in which the CPU changes the normal

processing flow in response to a reset, interrupt, or trap

instruction.

Program execution

state

The CPU executes program instructions in sequence.

Bus-released state

The external bus has been released in response to a bus

request signal from a bus master other than the CPU.

Power-down state

CPU operation is stopped

to conserve power.*

Sleep mode

Software standby

mode

Hardware standby

mode

Processing

states

Note: * The power-down state also includes a medium-speed mode, module stop mode,

sub-active mode, sub-sleep mode, and watch mode.

Figure 2.14 Processing States

HD64F2149YV 数据表(PDF) 96 Page - Renesas Technology Corp

HD64F2149YV 数据表(HTML) 96 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载