HD64F2149YV datasheet(26/1075 Pages) RENESAS

26 / 1075 page

Rev. 3.00 Jan 18, 2006 page xxvi of xxviii

22.10.1 Programmer Mode Setting ................................................................................... 719

22.10.2 Socket Adapters and Memory Map ..................................................................... 720

22.10.3 Programmer Mode Operation .............................................................................. 721

22.10.4 Memory Read Mode ............................................................................................ 722

22.10.5 Auto-Program Mode ............................................................................................ 726

22.10.6 Auto-Erase Mode ................................................................................................. 728

22.10.7 Status Read Mode ................................................................................................ 729

22.10.8 Status Polling ....................................................................................................... 731

22.10.9 Programmer Mode Transition Time .................................................................... 731

22.10.10 Notes On Memory Programming ...................................................................... 732

22.11 Flash Memory Programming and Erasing Precautions ..................................................... 732

Section 23 Clock Pulse Generator .................................................................................. 735

23.1

Overview........................................................................................................................... 735

23.1.1 Block Diagram ..................................................................................................... 735

23.1.2 Register Configuration......................................................................................... 736

23.2

Register Descriptions ........................................................................................................ 736

23.2.1 Standby Control Register (SBYCR) .................................................................... 736

23.2.2 Low-Power Control Register (LPWRCR) ........................................................... 737

23.3

Oscillator........................................................................................................................... 738

23.3.1 Connecting a Crystal Resonator........................................................................... 738

23.3.2 External Clock Input ............................................................................................ 740

23.4

Duty Adjustment Circuit ................................................................................................... 743

23.5

Medium-Speed Clock Divider .......................................................................................... 743

23.6

Bus Master Clock Selection Circuit .................................................................................. 743

23.7

Subclock Input Circuit ...................................................................................................... 743

23.8

Subclock Waveform Shaping Circuit................................................................................ 744

23.9

Clock Selection Circuit ..................................................................................................... 744

23.10 X1 and X2 Pins ................................................................................................................. 745

Section 24 Power-Down State ......................................................................................... 747

24.1

Overview........................................................................................................................... 747

24.1.1 Register Configuration......................................................................................... 751

24.2

Register Descriptions ........................................................................................................ 751

24.2.1 Standby Control Register (SBYCR) .................................................................... 751

24.2.2 Low-Power Control Register (LPWRCR) ........................................................... 753

24.2.3 Timer Control/Status Register (TCSR) ................................................................ 755

24.2.4 Module Stop Control Register (MSTPCR) .......................................................... 756

24.3

Medium-Speed Mode........................................................................................................ 757

24.4

Sleep Mode ....................................................................................................................... 758

24.4.1 Sleep Mode .......................................................................................................... 758

HD64F2149YV 数据表(PDF) 26 Page - Renesas Technology Corp

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