HD64F2149YV datasheet(66/1075 Pages) RENESAS

部件名	HD64F2149YV

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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66 / 1075 page

Section 2 CPU

Rev. 3.00 Jan 18, 2006 page 38 of 1044

REJ09B0280-0300

Stack Structure: When the program counter (PC) is pushed onto the stack in a subroutine call,

and the PC and condition-code register (CCR) are pushed onto the stack in exception handling,

they are stored as shown in figure 2.3. The extended control register (EXR) is not pushed onto the

stack. For details, see section 4, Exception Handling.

(a) Subroutine Branch

(b) Exception Handling

(16 bits)

CCR

CCR*

(16 bits)

Note: * Ignored when returning.

Figure 2.3 Stack Structure in Normal Mode

(2) Advanced Mode

Address Space: Linear access is provided to a 16-Mbyte maximum address space (architecturally

a maximum 16-Mbyte program area and a maximum 4-Gbyte data area, with a maximum of 4

Gbytes for program and data areas combined).

Extended Registers (En): The extended registers (E0 to E7) can be used as 16-bit registers, or as

the upper 16-bit segments of 32-bit registers or address registers.

Instruction Set: All instructions and addressing modes can be used.

HD64F2149YV 数据表(PDF) 66 Page - Renesas Technology Corp