HD64F2149YV datasheet(82/1075 Pages) RENESAS

82 / 1075 page

Section 2 CPU

Rev. 3.00 Jan 18, 2006 page 54 of 1044

REJ09B0280-0300

Type

Instruction

Size*

Function

Arithmetic

operations

DAA

DAS

Rd decimal adjust

→ Rd

Decimal-adjusts an addition or subtraction result in a

general register by referring to the CCR to produce 4-bit

BCD data.

MULXU

B/W

× Rs → Rd

Performs unsigned multiplication on data in two general

registers: either 8 bits

× 8 bits → 16 bits or 16 bits ×

16 bits

→ 32 bits.

MULXS

B/W

× Rs → Rd

Performs signed multiplication on data in two general

registers: either 8 bits

× 8 bits → 16 bits or 16 bits ×

16 bits

→ 32 bits.

DIVXU

B/W

Rd ÷ Rs

→ Rd

Performs unsigned division on data in two general

registers: either 16 bits ÷ 8 bits

→ 8-bit quotient and 8-bit

remainder or 32 bits ÷ 16 bits

→ 16-bit quotient and 16-

bit remainder.

DIVXS

B/W

Rd ÷ Rs

→ Rd

Performs signed division on data in two general

registers: either 16 bits ÷ 8 bits

→ 8-bit quotient and 8-bit

remainder or 32 bits ÷ 16 bits

→ 16-bit quotient and 16-

bit remainder.

CMP

B/W/L

Rd – Rs, Rd – #IMM

Compares data in a general register with data in another

general register or with immediate data, and sets CCR

bits according to the result.

NEG

B/W/L

0 – Rd

→ Rd

Takes the two's complement (arithmetic complement) of

data in a general register.

EXTU

W/L

Rd (zero extension)

→ Rd

Extends the lower 8 bits of a 16-bit register to word size,

or the lower 16 bits of a 32-bit register to longword size,

by padding with zeros on the left.

EXTS

W/L

Rd (sign extension)

→ Rd

Extends the lower 8 bits of a 16-bit register to word size,

or the lower 16 bits of a 32-bit register to longword size,

by extending the sign bit.

TAS

@ERd – 0, 1

→ (<bit 7> of @ERd)*2

Tests memory contents, and sets the most significant bit

(bit 7) to 1.

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