HD64F2149YV datasheet(470/1075 Pages) RENESAS

部件名	HD64F2149YV

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

PDF	1075 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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470 / 1075 page

Section 15 Serial Communication Interface (SCI, IrDA)

Rev. 3.00 Jan 18, 2006 page 442 of 1044

REJ09B0280-0300

Bit 1—Multiprocessor Bit (MPB): When reception is performed using a multiprocessor format

in asynchronous mode, MPB stores the multiprocessor bit in the receive data.

MPB is a read-only bit, and cannot be modified.

Bit 1

MPB

Description

[Clearing condition]

(Initial value)*

When data with a 0 multiprocessor bit is received

[Setting condition]

When data with a 1 multiprocessor bit is received

Note:

Retains its previous state when the RE bit in SCR is cleared to 0 with multiprocessor

format.

Bit 0—Multiprocessor Bit Transfer (MPBT): When transmission is performed using a

multiprocessor format in asynchronous mode, MPBT stores the multiprocessor bit to be added to

the transmit data.

The MPBT bit setting is invalid when a multiprocessor format is not used, when not transmitting,

and in synchronous mode.

Bit 0

MPBT

Description

Data with a 0 multiprocessor bit is transmitted

(Initial value)

Data with a 1 multiprocessor bit is transmitted

HD64F2149YV 数据表(PDF) 470 Page - Renesas Technology Corp