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HD64F2149YV 数据表(PDF) 949 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 949 Page - Renesas Technology Corp |
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949 / 1075 page ![]() Appendix B Internal I/O Registers Rev. 3.00 Jan 18, 2006 page 921 of 1044 REJ09B0280-0300 ABRKCR—Address Break Control Register H'FEF4 Interrupt Controller 7 CMF 0 R 6 — 0 — 5 — 0 — 4 — 0 — 3 — 0 — 0 BIE 0 R/W 2 — 0 — 1 — 0 — Bit Initial value Read/Write Break interrupt enable 0 Address break disabled 1 Address break enabled Condition match flag 0 [Clearing condition] When address break interrupt exception handling is executed 1 [Setting condition] When address set by BARA to BARC is prefetched while BIE = 1 |
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