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HD64F2149YV 数据表(PDF) 127 Page - Renesas Technology Corp |
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HD64F2149YV 数据表(HTML) 127 Page - Renesas Technology Corp |
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127 / 1075 page ![]() Section 4 Exception Handling Rev. 3.00 Jan 18, 2006 page 99 of 1044 REJ09B0280-0300 4.5 Stack Status after Exception Handling Figure 4.5 shows the stack after completion of trap instruction exception handling and interrupt exception handling. SP CCR CCR* PC (16 bits) Interrupt control modes 0 and 1 Note: * Ignored on return. Figure 4.5 (1) Stack Status after Exception Handling (Normal Mode) SP CCR PC (24 bits) Interrupt control modes 0 and 1 Figure 4.5 (2) Stack Status after Exception Handling (Advanced Mode) |
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