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ST7263BEx 数据表(PDF) 123 Page - STMicroelectronics

部件名 ST7263BEx
功能描述  Low speed USB 8-bit MCU family with up to 32 KB Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI and I²C
PDF  186 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7263BEx 数据表(HTML) 123 Page - STMicroelectronics

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ST7263Bxx
On-chip peripherals
Doc ID 7516 Rev 8
123/186
I²C Data register (DR)
These bits contain the byte to be received or transmitted on the bus.
Transmitter mode: byte transmission start automatically when the software writes in the
DR register.
Receiver mode: the first data byte is received automatically in the DR register using the
least significant bit of the address. The following data bytes are then received one by
one after reading the DR register.
Reset value: 0000 0000 (00h)
I²C Own Address register (OAR)
Reset value: 0000 0000 (00h)
7
0
D7
D6
D5
D4
D3
D2
D1
D0
Read/write
7
0
ADD7
ADD6
ADD5
ADD4
ADD3
ADD2
ADD1
ADD0
Read/write
[7:1] ADD[7:1] Interface address.
These bits define the I²C bus address of the interface. They are not cleared when
the interface is disabled (PE=0).
0 ADD0 Address direction bit.
This bit is don’t care, the interface acknowledges either 0 or 1. It is not cleared
when the interface is disabled (PE=0).
Note: Address 01h is always ignored.



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