ADE5166 datasheet(136/156 Pages) AD

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ADE5166/ADE5169/ADE5566/ADE5569

Rev. B | Page 136 of 156

UART2 OPERATION MODES

The UART2 has two operation modes in which each data byte

(LSB first) is preceded by a start bit (0), followed by a stop bit

(1). Therefore, each frame consists of 10 bits transmitted on the

TxD2 pin or received on the RxD2 pin.

The baud rate is set by a dedicated timer for baud rate genera-

tion, the UART2 timer, which has a fractional divisor to precisely

generate any baud rate.

Transmission is initiated by a write to the Serial Port 2 buffer SFR

(SBUF2, Address 0xEB). Next, a stop bit (1) is loaded into the

ninth bit position of the serial port shift register. The data is output

bit by bit until the stop bit appears on the TxD2 pin, and the

Serial Port 2 transmit interrupt flag, TI2 (SCON2[1]) is auto-

matically set, as shown in Figure 110.

TxD2

TI2

(SCON2[1])

START

BIT

STOP BIT

SET INTERRUPT

(FOR EXAMPLE,

READY FOR MORE DATA)

Figure 110. 8-Bit Variable Baud Rate

Reception is initiated when a 1-to-0 transition is detected on the

RxD2 pin. Assuming that a valid start bit is detected, character

reception continues. The eight data bits are clocked into the

serial port shift register.

All of the following conditions must be met at the time the final

shift pulse is generated to receive a character:

•

If the extended UART is disabled (EXTEN = 0, CFG[6]),

RI2 (SCON2[0]) must be 0 to receive a character. This ensures

that the data in the SBUF2 SFR is not overwritten if the last

received character has not been read.

•

If frame error checking is enabled by setting FE2 (SCON2[4]),

the received stop bit must be set to receive a character. This

ensures that every character received comes from a valid

frame, with both a start bit and a stop bit.

If any of these conditions is not met, the received frame is irre-

trievably lost, and the Serial Port 2 receive interrupt flag, RI2

(SCON2[0]), is not set.

If the received frame meets the preceding conditions, the fol-

lowing events occur:

•

The eight bits in the receive shift register are latched into

SBUF2.

•

The Serial Port 2 receiver interrupt flag (RI2) is set.

Transmission is initiated by any instruction that uses SBUF2 as

a destination register. Reception is initiated by the incoming start

bit if REN2 = 1 in the SCON2 SFR, Address0xE1[2].

9-Bit UART2 with Variable Baud Rate

Setting EN-T8 (SCON2[6]) selects the 9-bit mode. In this mode,

the UART2 serial port operates in 9-bit mode with a variable baud

rate. The baud rate is set by a dedicated timer for baud rate gen-

eration, the UART2 timer, which has a fractional divisor to

precisely generate any baud rate (see the UART2 Timer Generated

Baud Rates section). The operation of the 9-bit UART2 is the

same as for the 9-bit mode of the UART.

In both modes, transmission is initiated by any instruction that

uses SBUF2 as a destination register. Reception is initiated in

8-bit mode when RI2 = 0 and REN2 = 1 in the SCON2 SFR. Recep-

tion is initiated in the 9-bit mode by the incoming start bit if

REN2 = 1.

UART2 BAUD RATE GENERATION

The baud rate is determined by the overflow rate of the dedicated

baud rate generator, the UART2 timer, which has an integer and

fractional divisor.

UART2 Timer Generated Baud Rates

The enhanced Serial Baud Rate Control 2 SFR (SBAUD2,

Address 0xEE) is used to control the UART2 timer. SBAUD2 is

the baud rate control SFR; it sets up the integer divider (DIV2,

SBAUD2[2:0]) and the extended divider (SBTH2, SBAUD2[4:3])

for the UART2 timer.

The desired value to write to DIV2 and to SBTH2 can be cal-

culated using the following formula, where fcore is defined in the

POWCON SFR. Note that the DIV2 value must be rounded

down to the nearest integer.

DIV2 + SBTH2 =

()

log

⎟

⎠

⎞

⎜

⎝

⎛

Rate

Baud

core

SBAUDF2 is the fractional divider ratio required to achieve the

required baud rate. The appropriate value for SBAUDF2 can be

calculated with the following formula:

SBAUDF2 =

⎟

⎠

⎞

⎜

⎝

⎛

−

Rate

Baud

SBTH

DIV

core

Note that SBAUDF2 can take only two values, 0x2B or 0x07, by

clearing or by setting the SBF2 bit (SBAUD2[5]), respectively.

These values were chosen to provide an accurate baud rate for

300, 2400, 4800, 9600, 19,200, 38,400, 57,600, and 115,200 bps.

When DIV2 and SBAUDF2 are calculated, the actual baud rate

can be calculated, using the following formula:

Actual Baud Rate =

⎟

⎠

⎞

⎜

⎝

⎛ +

SBAUDF

SBTH

DIV

core

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