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OTB25LPLL 数据表(PDF) 46 Page - Actel Corporation

部件名 OTB25LPLL
功能描述  Ultra-Fast Local and Long-Line Network
PDF  174 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  ACTEL [Actel Corporation]
网页  http://www.actel.com
标志 ACTEL - Actel Corporation

OTB25LPLL 数据表(HTML) 46 Page - Actel Corporation

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ProASICPLUS Flash Family FPGAs
1- 42
v5.2
Tristate Buffer Delays
Figure 1-26 • Tristate Buffer Delays
Table 1-25 • Worst-Case Commercial Conditions
VDDP = 3.0 V, VDD = 2.3 V, 35 pF load, TJ = 70°C
Macro Type
Description
Max
tDLH
1
Max
tDHL
2
Max
tENZH
3
Max
tENZL
4
Units
Std.
–F
Std.
–F
Std.
–F
Std.
–F
OTB33PH
3.3 V, PCI Output Current, High Slew Rate
2.0
2.4
2.2
2.6
2.2
2.6
2.0
2.4
ns
OTB33PN
3.3 V, High Output Current, Nominal Slew Rate
2.2
2.6
2.9
3.5
2.4
2.9
2.1
2.5
ns
OTB33PL
3.3 V, High Output Current, Low Slew Rate
2.5
3.0
3.2
3.9
2.7
3.3
2.8
3.4
ns
OTB33LH
3.3 V, Low Output Current, High Slew Rate
2.6
3.1
4.0
4.8
2.8
3.4
3.0
3.6
ns
OTB33LN
3.3 V, Low Output Current, Nominal Slew Rate
2.9
3.5
4.3
5.2
3.2
3.8
4.1
4.9
ns
OTB33LL
3.3 V, Low Output Current, Low Slew Rate
3.0
3.6
5.6
6.7
3.3
3.9
5.5
6.6
ns
Notes:
1. tDLH=Data-to-Pad High
2. tDHL=Data-to-Pad Low
3. tENZH=Enable-to-Pad, Z to High
4. tENZL = Enable-to-Pad, Z to Low
5. All –F parts are only available as commercial.
Table 1-26 • Worst-Case Commercial Conditions
VDDP = 2.3 V, VDD = 2.3 V, 35 pF load, TJ = 70°C
Macro Type
Description
Max
tDLH
1
Max
tDHL
2
Max
tENZH
3
Max
tENZL
4
Units
Std.
–F
Std.
–F
Std.
–F
Std.
–F
OTB25LPHH
2.5 V, Low Power, High Output Current, High Slew Rate5
2.0
2.4
2.1
2.5
2.3
2.7
2.0
2.4
ns
OTB25LPHN
2.5 V, Low Power, High Output Current, Nominal Slew Rate5
2.4
2.9
3.0
3.6
2.7
3.2
2.1
2.5
ns
OTB25LPHL
2.5 V, Low Power, High Output Current, Low Slew Rate5
2.9
3.5
3.2
3.8
3.1
3.8
2.7
3.2
ns
OTB25LPLH
2.5 V, Low Power, Low Output Current, High Slew Rate5
2.7
3.3
4.6
5.5
3.0
3.6
2.6
3.1
ns
OTB25LPLN
2.5 V, Low Power, Low Output Current, Nominal Slew Rate5
3.5
4.2
4.2
5.1
3.8
4.5
3.8
4.6
ns
OTB25LPLL
2.5 V, Low Power, Low Output Current, Low Slew Rate5
4.0
4.8
5.3
6.4
4.2
5.1
5.1
6.1
ns
Notes:
1. tDLH=Data-to-Pad High
2. tDHL=Data-to-Pad Low
3. tENZH=Enable-to-Pad, Z to High
4. tENZL = Enable-to-Pad, Z to Low
5. Low power I/O work with VDDP=2.5 V ±10% only. VDDP=2.3 V for delays.
6. All –F parts are only available as commercial.
PAD
A
OTBx
A
50%
PAD
VOL
VOH
50%
t
DLH
50%
50%
tDHL
EN
50%
PAD
VOL
50%
tENZL
50%
10%
EN
50%
PAD
GND
V
OH
50%
t
ENZH
50%
90%
VDDP
35pF
EN



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