RM0319 datasheet(78/368 Pages) STMICROELECTRONICS

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Multiport DDR controller (MPMC)

RM0319

78/368

Doc ID 022640 Rev 3

Error conditions

Because of the programming difficulties of the weighted round-robin arbitration scheme, an

error reporting mechanism is included to notify users of illegal programming scenarios.

These error conditions generate a MPMC core interrupt and set a bit in the

wrr_param_value_err parameter to 1'b1. The potential error conditions are:

●

Bit 0 = The 5 ahbX_port_ordering parameters do not contain unique values.

●

Bit 1 = Any of the ahbX_priorityY_relative_priority parameters have been set to 10

value. A 0 value leads to unknown behavior. The minimum accepted value is 1.

●

Bit 2 = Any port, whose related bit of the weighted_round_robin_weight_sharing

parameter is set to 1'b1, do not have the same values in its

ahbX_priorityY_relative_priority parameter.

●

Bit 3 = For ports whose related bit of the weighted_round_robin_weight_sharing

parameter is set to 1'b1, the values of the ahbX_port_ordering parameters are not

sequential.

If bits 0, 2 or 3 are set to 1'b1 in the wrr_param_value_err parameter, and any of the ports

are paired in the weighted_round_robin_weight_sharing parameter, all weight sharing data

will be ignored during MPMC initialization and the ports will be prioritized by port number. If

port pairing is not being used, but the bit 0 error condition is set to 1'b1, then ports with a

non-unique port ordering are prioritized by port number.

Note:

The user is strongly cautioned against modifying the values of the port ordering or relative

priority parameters during active port usage.

Command queue with placement logic

From the arbiter, commands are routed to the command queue of the core. The command

queue is fed using a placement algorithm. For more information on this algorithm, refer to

below Chapter “Core Command Queue with Placement Logic”.

Core command queue with placement logic

The MPMC core contains a command queue that accepts commands from the arbiter. This

command queue uses a placement algorithm to determine the order in which commands

will be executed in the core. The placement logic follows many rules to determine where

new commands should be inserted into the queue, relative to the contents of the command

queue at the time.

Placement is determined by considering address collisions, source collisions, data

collisions, command types and priorities. In addition, the placement logic attempts to

P2-P0-P1-P3

P5-P4

P0-P1-P3-P2

P5-P4

P0-P1-P3-P2

P5-P4

Table 29.

System G operation (continued)

Cycle

Ports Requesting

Arbitration

Winner

Next Counter

Next Scan Order

P0 P1 P2 P3 P4 P5

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