RM0319 datasheet(36/368 Pages) STMICROELECTRONICS

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BootROM

RM0319

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Doc ID 022640 Rev 3

Figure 5.

Boot stages

5.3

Booting pins

Refer to the datasheet for the table of Boot pin values used to select each boot mode. The

values of the pins are latched at startup and are readable from the Boot_Strap_Reg

described in the RAS configuration (RASCFG) chapter in RM0321: SPEAr320S address

map and registers.

This is the primary OS

This is the third level boot code. It copies the primary OS

into the SDRAM and jumps to it.

BootROM

X-Loader

Bootloader

After exiting the reset state, the ARM runs the

BootROM code.

1. In the case of Flash booting it copies a second

level boot code from Flash to the internal SRAM

(shadow memory) and jumps to it. This mechanism

is called ‘Code Shadowing’

2. In case of non-Flash booting, it receives the

second level boot code, executes it and then

receives third level boot code and jumps to it.

3. Upgrade the Flash through USB.

This is the second level boot code. It should be very

small to fit into the internal SRAM (8 KB) and know

the timing details of the external SDRAM. It enables

SDRAM and:

1. In the case of Flash booting, it copies the third

level boot code and jumps to it.

2. In case of non-Flash booting, it jumps back to

BootROM.

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