RM0319 datasheet(38/368 Pages) STMICROELECTRONICS

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BootROM

RM0319

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Doc ID 022640 Rev 3

5.5

Software overview

This section describes the BootROM software for the device.

5.5.1

ARM processor modes

SPEAr BootROM runs in supervisor mode during the entire execution.

5.5.2

SoC peripheral interrupts

SPEAr BootROM runs with all interrupts disabled, except in the particular case of

boot/upgrade through USB, in which case it enables the USB interrupt.

5.5.3

Memory overview

BootROM in SPEAr is located at 0xFFFF_0000. It has two sections:

●

Code section

●

Table section

Code section

Code section starts from 0xFFFF_0000 and ends at 0xFFFF_7EFF. This section contains all

the routines required to boot on SPEAr device.

Table section

Table section starts from 0xFFFF_7F00 and ends at 0xFFFF_7FFF. In the table section, a

table is maintained keeping the information usable by the second level boot, for instance

addresses of NAND routines. These routines of BootROM are used by X-Loader. This helps

reducing code length of X-Loader.

The table consists of one structure having the following two variables:

●

Table version (data type: unsigned integer)

●

Version specific structure

The following figure shows the memory used by BootROM:

Figure 7.

Usage of memory by BootROM

Unused Section

Table Section

Unused Section

Code Section

0xFFFF_7FFF

0xFFFF_7FXX

0xFFFF_7F00

0xFFFF_XXXX

0xFFFF_0000

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