AD6676EBZ datasheet(33/90 Pages) AD

33 / 90 page

Data Sheet

AD6676

Rev. A | Page 33 of 90

The following example highlights how this feature is used for

applications that require wide bandwidth capability but not

necessarily instantaneous bandwidth. In these applications, it

may be possible to divide the required IF bandwidth into

narrow subbands where the Σ-Δ ADC can provide higher

dynamic range. For instance, in an application that requires

120 MHz of IF bandwidth, consider dividing this bandwidth

into three contiguous blocks of 40 MHz, with each IF being

offset by 40 MHz. Figure 91 shows that the worst-case NSD is

limited to −149 dBFS/Hz when the AD6676 is configured for the

wider bandwidth of 120 MHz. Figure 92 shows how the NSD

performance is improved by 10 dB when the 120 MHz

bandwidth is subdivided into three 40 MHz bands.

–145

–160

–155

–150

200

220

240

260

280

300

320

INPUT FREQUENCY (MHz)

PROFILE = 0

(IF = 260MHz, BW = 120MHz)

–149dBFS/Hz

Figure 91. NSD Performance with Wideband Profile (FIF = 260 MHz, BW =

120 MHz, FADC = 3.2 GHz, LEXT = 27 nH)

–145

–160

–155

–150

200

220

240

260

280

300

320

INPUT FREQUENCY (MHz)

PROFILE = 1

(IF = 260MHz,

BW = 40MHz)

PROFILE = 2

(IF = 300MHz,

BW = 40MHz)

PROFILE = 0

(IF = 220MHz,

BW = 40MHz)

–159dBFS/Hz

Figure 92. NSD Performance with Narrow-Band Profiles (FIF = 220 MHz,

260 MHz, and 300 MHz, BW = 120 MHz, FADC = 3.2 GHz, LEXT = 27 nH)

In this example, the frequency and phase settings of the digital

mixer remained common among the various profiles such that

it remained centered upon 260 MHz. It is also possible to

provide a unique digital mixer setting for each profile if it is

desirable to re-center the digital IF frequency. This feature is

desirable in instances where the range of IFs cannot be supported

by the pass band response of the digital decimation filter.

ATTENUATOR

The AD6676 includes an on-chip differential 27 dB attenuator with

a resolution of 1 dB. The attenuator can be used to rescale the full-

scale input level into the ADC for system calibration or for

optimization purposes or to prevent possible overload of the Σ-Δ

ADC when used with external AGC control. Figure 93 shows a

simplified equivalent circuit of the AD6676 input stage, which

includes RESON1 and IDAC1. The attenuator provides a

nominal input resistance (RIN) of 60 Ω to the signal source to

facilitate its interface to external driver circuitry. The attenuator is

configurable via Register 0x181 to Register 0x183 and includes

options for fast external gain control via the AGC pins. Note that

the latency from when an external CMOS signal is applied to the

AGC pins to when the attenuator changes state is within 5 ns.

0.1µF

IDAC1

ATTENUATOR

0dB TO 27dB

Δ = 1dB

REG 0x180

TO 0x181

VIN+

L–

L+

VIN–

RIN = 60Ω

VCM = 1.0V

CARRAY

SUMMING

JUNCTION

10Ω

VDD2 = 2.5V

LEXT

AD6676

Figure 93. Simplified Equivalent Input

Attenuation is achieved by a programmable shunt and series

resistor network that steers some designated amount of input

current away from the summing junction while keeping the

nominal input resistance near 60 Ω over the full attenuation

span. For a 0 dB setting, no shunt resistance exists; therefore,

all of the input current is fed into the summing junction. For a

6 dB setting, the attenuator is configured with a 120 Ω shunt

resistor operating in parallel with two 60 Ω series resistors such

that half of the signal input current is directed into the summing

junction while maintaining a nominal 60 Ω input resistance.

Other settings function in a similar manner with resistor values

modified to achieve the desired attenuation value while

maintaining the nominal RIN. Figure 94 shows the differential

S11 of the AD6676 input for different attenuator settings.

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