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AD6676EBZ 数据表(PDF) 71 Page - Analog Devices |
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AD6676EBZ 数据表(HTML) 71 Page - Analog Devices |
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71 / 90 page  Data Sheet AD6676 Rev. A | Page 71 of 90 Bandwidth Margin (IF) Register Address: 0x109, Reset: 0x00, Name: MRGN_IF Table 49. Bit Descriptions for MRGN_IF Bits Bit Name Description Reset Access [7:0] MRGN_IF An 8-bit register defining the offset frequency (to 1 MHz resolution) to which the frequency of the LC resonator is offset from its theoretical ideal value. The default setting is 0 MHz. Increasing the value increases the actual resonator frequency. 0x00 RW IDAC1FS Gain Scaling Register Address: 0x10A, Reset: 0x40, Name: IDAC1_FS Table 50. Bit Descriptions for IDAC1_FS Bits Bit Name Description Reset Access [7:0] IDAC1_FS This parameter allows adjustment of the full-scale input power level of the ADC by adjusting the full-scale current of IDAC1. The nominal setting of 0x40 sets IDAC1 FS value to 4 mA and corresponds to the largest full-scale level of approximately −3 dBm (with the IF attenuator set to 0 dB.) A setting of 0x20 or 0x10 results IDAC1 FS value to 2 mA or 1 mA, thus resulting in a 6 dB or 12 dB reduction in PIN_0dBFS. Settings resulting in more than 12 dB reduction are not recommended. 0x40 RW Calibration Control Register Address: 0x115, Reset: 0x00, Name: CAL_CTRL Table 51. Bit Descriptions for CAL_CTRL Bits Bit Name Description Reset Access [7:2] RESERVED 0x00 RW [1:0] CAL_PROFILE ADC profile to be calibrated. Select one of the four ADC profiles in which to store the results of the calibration. For example, to support multiple IF settings, the four profiles cover all registers in the range of 0x141 to 0x145. RW Calibration Command Register Address: 0x116, Reset: 0x00, Name: CAL_CMD Table 52. Bit Descriptions for CAL_CMD Bits Bit Name Description Reset Access [7:6] RESERVED 0x0 RWAC 5 INIT_NTF_OP 0x0 RWAC 4 INIT_JESD 0x0 RWAC 3 RESON1_CAL 0x0 RWAC 2 FLASH_CAL 0x0 RWAC 1 INIT_ADC 0x0 RWAC 0 TUNE_ADC 0x0 RWAC Setting a 1 in one or more of the bits in this register initiates the internal calibration. This register is cleared automatically at the end of calibration or by setting the FORCE_END_CAL bit. Calibration Done Register Address: 0x117, Reset: 0x00, Name: CAL_DONE Table 53. Bit Descriptions for ADC_PROFILE Bits Bit Name Description Reset Access [7:1] RESERVED 0x00 RW [0] CAL_DONE This bit indicates that the microcontroller has completed its calibration. It is automatically cleared by a new CAL_CMD. 0x0 RW |
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