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AD6676EBZ 数据表(PDF) 76 Page - Analog Devices |
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AD6676EBZ 数据表(HTML) 76 Page - Analog Devices |
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76 / 90 page  AD6676 Data Sheet Rev. A | Page 76 of 90 ADC Reset Attenuation Step Register Address: 0x18A, Reset: 0x06, Name: ATTEN_STEP_RE Table 73. Bit Descriptions for ATTEN_STEP_RE Bits Bit Name Description Reset Access [7:5] RESERVED 0x0 RW [4:0] ATTEN_STEP_RE The size of the increase in attenuation after a reset event, in dB. The attenuation is clipped to a maximum value of 27 dB. 0x06 RW ADC Unstable Flag Control Register Address: 0x18F, Reset: 0x00, Name: ADC_UNSTABLE Table 74. Bit Descriptions for ADC_UNSTABLE Bits Bit Name Description Reset Access [7:2] RESERVED 0x00 RW 1 CLEAR_UNSTABLE_FLAG Clear unstable flag. Writing a 1 to this bit clears the UNSTABLE_FLAG. This bit is self clearing. 0x0 RW 0 UNSTABLE_FLAG Unstable flag. This is a sticky flag that indicates if an ADC reset condition has been detected. It is cleared only by the CLEAR_UNSTABLE_FLAG bit and the hardware/software resets. 0x0 R Peak Threshold 0 LSB Register Address: 0x193, Reset: 0x00, Name: PKTHRH0_LSB Table 75. Bit Descriptions for PKTHRH0_LSB Bits Bit Name Settings Description Reset Access [7:0] PKTHRH0_LSB Peak Threshold 0 LSB. 0x00 RW Peak Threshold 0 MSB Register Address: 0x194, Reset: 0x00, Name: PKTHRH0_MSB Table 76. Bit Descriptions for PKTHRH0_MSB Bits Bit Name Settings Description Reset Access [7:4] RESERVED 0x0 RW [3:0] PKTHRH0_MSB Peak Threshold 0 MSB. 0x0 RW Peak Threshold 1 LSB Register Address: 0x195, Reset: 0x00, Name: PKTHRH1_LSB Table 77. Bit Descriptions for PKTHRH1_LSB Bits Bit Name Settings Description Reset Access [7:0] PKTHRH1_LSB Peak Threshold 1 LSB. 0x00 RW Peak Threshold 1 MSB Register Address: 0x196, Reset: 0x00, Name: PKTHRH1_MSB Table 78. Bit Descriptions for PKTHRH1_MSB Bits Bit Name Settings Description Reset Access [7:4] RESERVED 0x0 RW [3:0] PKTHRH1_MSB Peak Threshold 1 MSB. 0x0 RW |
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