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AD6676EBZ 数据表(PDF) 68 Page - Analog Devices

部件名 AD6676EBZ
功能描述  Wideband IF Receiver Subsystem
PDF  90 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6676EBZ 数据表(HTML) 68 Page - Analog Devices

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AD6676
Data Sheet
Rev. A | Page 68 of 90
REGISTER DETAILS
SPI Configuration Register
Address: 0x000, Reset: 0x18, Name: SPI_CONFIG
Table 33. Bit Descriptions for SPI_CONFIG
Bits
Bit Name
Description
Reset
Access
7
SW_RESET
Self-clearing bit causing software reset when set. Software reset returns all SPI registers to
default state.
0
RW
6
LSB_FIRST
When set, causes input and output data to be orientated as LSB first, per SPI standard.
0
4
SDIO_DIR
When set, causes SPI interface to be 4-wire with output data appearing on the SDO pin.
1
This register uses the first four bits to configure SPI interface/format thus Bit 0, Bit 1, and Bit 3 are mirror images of Bit 7, Bit 6, and Bit 4.
Device Configuration Register
Address: 0x002, Reset: 0x00, Name: DEVICE_CONFIG
Table. Bit Descriptions for DEVICE_CONFIG
Bits
Bit Name
Description
Reset
Access
[7:2]
RESERVED
0x0
RW
[1:0]
PD_MODE
Power-down/standby control
0x0
RW
00 = normal operation
01 = not used.
10 = standby mode
11 = sleep (power-down) mode
Chip Type Register
Address: 0x003, Reset: 0x03, Name: CHIP_TYPE
Table 34. Bit Descriptions for CHIP_TYPE
Bits
Bit Name
Description
Reset
Access
[7:0]
CHIP_TYPE
Chip Type: High Speed ADC.
0x03
R
Chip ID 0 Register
Address: 0x004, Reset: 0xBB, Name: CHIP_ID0
Table 35. Bit Descriptions for CHIP_ID0
Bits
Bit Name
Description
Reset
Access
[7:0]
CHIP_ID0
Chip ID Low Byte.
0xBB
R
Chip ID 1 Register
Address: 0x005, Reset: 0x00, Name: CHIP_ID1
Table 36. Bit Descriptions for CHIP_ID1
Bits
Bit Name
Description
Reset
Access
[7:0]
CHIP_ID1
Chip ID High Byte.
0x00
R



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