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AD6676EBZ 数据表(PDF) 67 Page - Analog Devices |
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AD6676EBZ 数据表(HTML) 67 Page - Analog Devices |
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67 / 90 page  Data Sheet AD6676 Rev. A | Page 67 of 90 Reg Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Reset RW 0x196 PKTHRH1_MSB RESERVED PKTHRH1_MSB 0x00 RW 0x197 LOWTHRH_LSB LOWTHRH_LSB 0x00 RW 0x198 LOWTHRH_MSB RESERVED LOWTHRH_MSB 0x00 RW 0x199 DWELL_TIME_MANTISSA DWELL_TIME_MANTISSA 0x00 RW 0x19A DWELL_TIME_EXP RESERVED DWELL_TIME_EXP 0x00 RW 0x19B FLAG0_SEL RESERVED FLAG0_SEL 0x00 RW 0x19C FLAG1_SEL RESERVED FLAG1_SEL 0x00 RW 0x19E EN_FLAG RESERVED EN_OR RESERVED EN_FLAG1 EN_FLAG0 0x00 RW GPIO Configuration 0x1B0 FORCE_GPIO RESERVED FORCE_GPIO 0x00 RW 0x1B1 FORCE_GPIO_OUT RESERVED FORCE_GPIO_OUT 0x00 RW 0x1B2 FORCE_GPIO_VAL RESERVED FORCE_GPIO_VAL 0x00 RW 0x1B3 READ_GPO RESERVED READ_GPO 0x00 R 0x1B4 READ_GPI RESERVED READ_GPI 0x00 R JESD204B Interface 0x1C0 DID DID 0x00 RW 0x1C1 BID RESERVED BID 0x00 RW 0x1C3 L SCR RESERVED L 0x00 RW 0x1C4 F F 0x03 RW 0x1C5 K RESERVED K 0x1F RW 0x1C6 M M 0x01 RW 0x1C9 S RESERVED S 0x00 RW 0x1CB RES1 RES1 0x00 RW 0x1CC RES2 RES2 0x00 RW 0x1D0 LID0 RESERVED LID0 0x00 RW 0x1D1 LID1 RESERVED LID1 0x01 RW 0x1D8 FCHK0 FCHK0 0x44 RW 0x1D9 FCHK1 FCHK1 0x45 RW 0x1E0 EN_LFIFO RESERVED EN_LFIFO 0x00 RW 0x1E1 SWAP RESERVED SWAP_CONV RESERVED SWAP_LANE 0x00 RW 0x1E2 LANE_PD ILAS_DELAY RESERVED LANE_PD 0x00 RW 0x1E3 MIS1 RESERVED TEST_SAMPLE_EN LSYNC_EN ILAS_MODE FACI_DISABLE RESERVED 0x14 RW 0x1E4 SYNC_PIN RESERVED SYNC_PIN_INV RESERVED INV_10B RESERVED 0x00 RW 0x1E5 TEST_GEN RESERVED TEST_GEN_SEL TEST_GEN_MODE 0x00 RW 0x1E6 KF_ILAS KF_ILAS 0x00 RW 0x1E7 SYNCINB_CTRL RESERVED PD_SYSREF_RX LVDS_SYNCINB RESERVED 0x00 RW 0x1E8 MIX_CTRL RESERVED MIX_USE_2ND MIX_NEXT MIX_ALL RESERVED USE_2ND_ SYSREF NEXT_SYSREF ALL_SYSREF 0x00 RW 0x1E9 K_OFFSET RESERVED K_OFFSET 0x00 RW 0x1EA SYSREF SYSREF_WIN_NEG SYSREF_WIN_POS 0x00 RW 0x1EB SER1 SER_DRV_PS RESERVED 0x1C RW 0x1EC SER2 SER_ITRIM SER_RTRIM 0x9B RW 0x1EF PRE-EMPHASIS SER_EMP_PS1 SER_EMP_IDAC1 SER_EMP_PS0 SER_EMP_IDAC0 0x00 RW ADC Clock Synthesizer 0x2A0 CLKSYN_ENABLE EN_EXTCK EN_ADC_CK EN_SYNTH EN_VCO_ PTAT EN_VCO _ALC EN_VCO EN_OVERRIDE_ CAL EN_OVERRIDE 0x00 RW 0x2A1 CLKSYN_INT_N_LSB INT_N_LSB[7:0] 0x80 RW 0x2A2 CLKSYN_INT_N_MSB RESERVED INT_N_MSB[10:8] 0x00 RW 0x2A5 VCO_CAL_RESET RESERVED VCO_CAL_ RESET RESERVED 0x00 RW 0x2AA CLKSYN_VCO_BIAS RESERVED BIAS_TEMPCO RESERVED BIAS 0x37 RW 0x2AB CLKSYN_VCO_CAL INIT_ALC_VALUE ALC_DIS RESERVED ID_SYNTH 0xC0 RW 0x2AC CLKSYN_I_CP RESERVED I_CP 0x19 RW 0x2AD EN_CP_CAL EN_CP_CAL RESERVED 0x00 0x2B7 CLKSYN_VCO_VAR VCO_VAR RESERVED 0xD0 RW 0x2BB CLKSYN_R_DIV R_DIV RESERVED SYSREF_ CTRL CLKIN_IMPED RESERVED 0xB9 RW 0x2BC CLKSYN_STATUS RESERVED PLL_LCK RESERVED VCO CAL BUSY CP CAL DONE 0x80 R 0x2DC JESDSYN_STATUS RESERVED PLL_LCK RESERVED VCO CAL BUSY CP CAL DONE 0x80 R ADC Adaptive Shuffler Control 0x340 SHUFFLE_CTRL RESERVED EN_ADAPTIVE_ SHUFFLE 0x03 RW 0x342 SHUFFLE_THREG_0 SHUFFLE_TH2 SHUFFLE_TH1 0xF5 RW 0x343 SHUFFLE_THREG_1 SHUFFLE_TH4 SHUFFLE_TH3 0xFF RW |
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