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TNETX3150 数据表(PDF) 103 Page - Texas Instruments

部件名 TNETX3150
功能描述  ThunderSWITCHE 15-PORT 10-/100-MBIT/S ETHERNETE SWITCH
PDF  113 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TNETX3150 数据表(HTML) 103 Page - Texas Instruments

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TNETX3150/TNETX3150A
ThunderSWITCH™ 15-PORT 10-/100-MBIT/S ETHERNET™ SWITCH
SPWS027F – FEBRUARY 1997 – REVISED SEPTEMBER 1997
103
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
timing requirements over recommended operating conditions (see Figure 44)
MII receive 100/200 Mbit/s (XX = ports 00–02)
NO
TNETX3150
TNETX3150A
UNIT
NO.
MIN
MAX
MIN
MAX
UNIT
1
tsu(MXXRXD)1
Setup time, MXXRXD3–MXXRXD0 valid before MXXRCLK
↑
8
8
ns
1†
tsu(MXXRXD)2
Setup time, MXXRXD7–MXXRXD0 valid before MXXRCLK
↑
8
8
ns
1
tsu(MXXRXDV)
Setup time, MXXRXDV valid before MXXRCLK
↑
8
8
ns
1†
tsu(MXXRXDVX)
Setup time, MXXRXDVX valid before MXXRCLK
↑
8
8
ns
1
tsu(MXXRXER)
Setup time, MXXRXER valid before MXXRCLK
↑
8
8
ns
2
th(MXXRXD)1
Hold time, MXXRXD3–MXXRXD0 valid after MXXRCLK
↑
8
8
ns
2†
th(MXXRXD)2
Hold time, MXXRXD7–MXXRXD0 valid after MXXRCLK
↑
8
8
ns
2
th(MXXRXDV)
Hold time, MXXRXDV valid after MXXRCLK
↑
8
8
ns
2†
th(MXXRXDVX)
Hold time, MXXRXDVX valid after MXXRCLK
↑
8
8
ns
2
th(MXXRXER)
Hold time, MXXRXER valid after MXXRCLK
↑
8
8
ns
† Also applies to the uplink (port 00) when operating in the 200-Mbit/s mode, except that MXXRXD3–MXXRXD0 is replaced with
MXXRXD7–MXXRXD0 and MXXRXDVX is used.
MXXRXD3–MXXRXD0 is driven by the PHY on the falling edge of MXXRCLK. MXXRXD3–MXXRXD0 timing
must be met during clock periods when MXXRXDV is asserted. MXXRXDV is asserted and deasserted by the
PHY on the falling edge of MXXRCLK. MXXRXER is driven by the PHY on the falling edge of MXXRCLK
(XX = ports 00–02).
MXXRCLK
(input)
MXXRXD7–MXXRXD0
MXXRXD3–MXXRXD0
MXXRXDV
MXXRXDVX
MXXRXER (inputs)
1
2
Figure 44. Ports (00–02) Receive Interface Timing



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