5222-DS02-R datasheet(30/76 Pages) BOARDCOM

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BCM5222

Preliminary Data Sheet

7/20/04

Broadcom Corporation

Page 18

MII Control Register

Document 5222-DS02-405-R

RESET

To reset the BCM5222 by software control, a 1 must be written to bit 15 of the Control register using an MII write operation.

The bit clears itself after the reset process is complete, and need not be cleared using a second MII write. Writes to other

Control register bits has no effect until the reset process is completed, which requires approximately 1

µs. Writing a 0 to this

bit has no effect. Since this bit is self-clearing, within a few cycles after a write operation, it returns a 0 when read.

LOOPBACK

The BCM5222 may be placed into loopback mode by writing a 1 to bit 14 of the Control register. Clear the loopback mode

by writing a 0 to bit 14 of the Control register, or by resetting the chip. When this bit is read, it returns a 1 when the chip is in

loopback mode, otherwise it returns a 0.

FORCED SPEED SELECTION

If auto-negotiation is enabled (both auto-negotiation pin and bit are enabled) or disabled by hardware control (auto-

negotiation pin is pulled-low), this bit has no effect on the speed selection. However, if auto-negotiation is enabled by

hardware, but is disabled by software control, the operating speed of the BCM5222 can be forced by writing the appropriate

value to bit 13 of the Control register. In this state, the speed is not affected by the F100 hardware pin. Writing a 1 to this bit

forces 100BASE-TX operation, while writing a 0 forces 10BASE-T operation. When this bit is read, it returns the value of the

software-controlled forced speed selection only. To read the overall state of forced speed selection, including both hardware

and software control, use bit 2 of the Auxiliary Control register (18h).

AUTO-NEGOTIATION ENABLE

Auto-negotiation can be disabled by one of two methods: hardware or software control. If the ANEN input pin is driven to a

logic 0, auto-negotiation is disabled by hardware control. If bit 12 of the Control register is written with a value of 0, auto-

negotiation is disabled by software control. When auto-negotiation is disabled in this manner, writing a 1 to the same bit of

the Control register or resetting the chip re-enables auto-negotiation. Writing to this bit has no effect when auto-negotiation

has been disabled by hardware control. When read, this bit returns the value most recently written to this location, or 1 if it

has not been written since the last chip reset.

Isolate

R/W

1 = Electrically isolate PHY from MII

0 = Normal operation

Restart Auto-Negotiation

R/W

(SC)

1 = Restart Auto-negotiation process

0 = Normal operation

Duplex Mode

R/W

1 = Full-duplex

0 = Half-duplex

Collision Test Enable

R/W

1 = Enable the collision test mode

0 = Disable the collision test mode

6:0

Reserved

Ignore when read

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = latched low, LH = latched high (LL and LH are cleared

after read operation)

Table 7: MII Control Register (Address 00000b, 0d, 00h)

Bit

Name

R/W

Description

Default

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