5222-DS02-R datasheet(36/76 Pages) BOARDCOM

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BCM5222

Preliminary Data Sheet

7/20/04

Broadcom Corporation

Page 24

Auto-Negotiation Link Partner (LP) Ability Register

Document 5222-DS02-405-R

AUTO-NEGOTIATION LINK PARTNER (LP) ABILITY REGISTER

The values contained in the Auto-Negotiation Link Partner Ability register are only guaranteed to be valid after auto-

negotiation has successfully completed, as indicated by bit 5 of the MII Status register.

LP NEXT PAGE

Bit 15 of the Link Partner Ability register returns a value of 1 when the link partner implements the next page function and

has next page information that it wants to transmit.

LP ACKNOWLEDGE

Bit 14 of the Link Partner Ability register is used by auto-negotiation to indicate that a device has successfully received its

link partner’s link code word.

LP REMOTE FAULT

Bit 13 of the Link Partner Ability register returns a value of 1 when the link partner signals that a remote fault has occurred.

The BCM5222 simply copies the value to this register and does not act upon it.

Reserved Bits

Ignore when read.

LP Advertise Pause

Indicates that the Link Partner Pause bit is set.

Table 11: Auto-Negotiation Link Partner Ability Register (Address 05d, 05h)

Bit

Name

R/W

Description

Default

LP Next Page

Link partner next page bit

LP Acknowledge

Link partner acknowledge bit

LP Remote Fault

Link partner remote fault indicator

12:11

Reserved

Ignore when read

LP Advertise Pause

Link partner has pause capability

LP Advertise 100BASE-T4

Link partner has 100BASE-T4 capability

LP Advertise 100BASE-TX FDX

Link partner has 100BASE-TX FDX capability

LP Advertise 100BASE-TX

Link partner has 100BASE-TX capability

LP Advertise 10BASE-T FDX

Link partner has 10BASE-T FDX capability

LP Advertise 10BASE-T

Link partner has 10BASE-T capability

4:0

Link Partner Selector Field

Link partner selector field

00000

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL & LH Clear after

read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

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